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ST STM32WL55JC User Manual

ST STM32WL55JC
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Debug support (DBG) RM0453
1388/1454 RM0453 Rev 2
38.9.7 FPB CoreSight peripheral identity register 2 (FPB_PIDR2)
Address offset: 0xFE8
Reset value: 0x0000 002B
38.9.8 FPB CoreSight peripheral identity register 3 (FPB_PIDR3)
Address offset: 0xFEC
Reset value: 0x0000 0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Res. Res. Res. Res. Res. Res. Res. Res. REVISION[3:0] JEDEC JEP106ID[6:4]
rrrrrrrr
Bits 31:8 Reserved, must be kept at reset value.
Bits 7:4 REVISION[3:0]: component revision number
0x2: r0p3
Bit 3 JEDEC: JEDEC assigned value
0x1: Designer ID specified by JEDEC
Bits 2:0 JEP106ID[6:4]: JEP106 identity code bits [6:4]
0x3: Arm
®
JEDEC code
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Res. Res. Res. Res. Res. Res. Res. Res. REVAND[3:0] CMOD[3:0]
rrrrrrrr
Bits 31:8 Reserved, must be kept at reset value.
Bits 7:4 REVAND[3:0]: metal fix version
0x0: No metal fix
Bits 3:0 CMOD[3:0]: customer modified
0x0: No customer modifications

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ST STM32WL55JC Specifications

General IconGeneral
BrandST
ModelSTM32WL55JC
CategoryMicrocontrollers
LanguageEnglish

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