General-purpose I/Os (GPIO) RM0453
416/1454 RM0453 Rev 2
10.4.21 GPIOC alternate function high register (GPIOC_AFRH)
Address offset: 0x0824
Reset value: 0x0000 0000
10.4.22 GPIOC bit reset register (GPIOC_BRR)
Address offset: 0x0828
Reset value: 0x0000 0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
AFSEL15[3:0] AFSEL14[3:0] AFSEL13[3:0] Res. Res. Res. Res.
rw rw rw rw rw rw rw rw rw rw rw rw
1514131211109876543210
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
Bits 31:28 AFSEL15[3:0]: Port PC15 alternate function selection
Bits 27:24 AFSEL14[3:0]: Port PC14 alternate function selection
Bits 23:20 AFSEL13[3:0]: Port PC13 alternate function selection
These bits are written by software to configure alternate function I/Os.
0x0: AF0 selected
0x1: AF1 selected
0x2: AF2 selected
...
0xE: AF14 selected
0xF: AF15 selected
Bits 19:0 Reserved, must be kept at reset value.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
1514131211109876543210
BR15 BR14 BR13 Res. Res. Res. Res. Res. Res. BR6 BR5 BR4 BR3 BR2 BR1 BR0
rc_w1 rc_w1 rc_w1 rc_w1 rc_w1 rc_w1 rc_w1 rc_w1 rc_w1 rc_w1
Bits 31:16 Reserved, must be kept at reset value.
Bit 15 BR15: Port PC15 reset output data bit [15] in GPIOC_ODR
Bit 14 BR14: Port PC14 reset output data bit [14] in GPIOC_ODR
Bit 13 BR13: Port PC13 reset output data bit [13] in GPIOC_ODR
Bits 12:7 Reserved, must be kept at reset value.
Bit 6 BR6: Port PC6 reset output data bit [6] in GPIOC_ODR
Bit 5 BR5: Port PC5 reset output data bit [5] in GPIOC_ODR
Bit 4 BR4: Port PC4 reset output data bit [4] in GPIOC_ODR
Bit 3 BR3: Port PC3 reset output data bit [3] in GPIOC_ODR