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ST STM32WL55JC User Manual

ST STM32WL55JC
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Page #729 background image
RM0453 Rev 2 729/1454
RM0453 Advanced-control timer (TIM1)
822
Figure 133. Counter timing diagram, internal clock divided by 4
Figure 134. Counter timing diagram, internal clock divided by N
0000
0001
0035
0036
MS31080V2
CK_PSC
Timerclock = CK_CNT
Counter register
Update event (UEV)
Counter overflow
Update interrupt flag
(UIF)
CNT_EN
00
1F
20
MS31081V2
CK_PSC
Timerclock = CK_CNT
Counter register
Update event (UEV)
Counter overflow
Update interrupt flag
(UIF)

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ST STM32WL55JC Specifications

General IconGeneral
SeriesSTM32WL
Speed48MHz
Flash Memory256 KB
RAM64 KB
Voltage - Supply (Vcc/Vdd)1.8 V ~ 3.6 V
RF Frequency150MHz ~ 960MHz
Data ConvertersA/D 12x12b; D/A 1x12b
ADC Channels12
DAC Channels1
Sub-GHz RadioYes
Core ProcessorARM Cortex-M4
ConnectivityI2C, SPI, UART
Oscillator TypeInternal
Operating Temperature-40°C ~ 85°C
Communication InterfacesI2C, SPI, USART
Wireless ConnectivityLoRa, Sigfox
Radio Frequency Range150MHz ~ 960MHz
PeripheralsDMA, POR, PWM, WDT

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