10-3 Free-Running Timer Interrupts ······················································································195
10-4 Synchronization by Writing to FRCs ············································································196
10-5 Effect of Changing Internal Clock Sources ···································································204
11-1 Input and Output Pins of 8-Bit Timer ············································································209
11-2 8-Bit Timer Registers ·····································································································209
11-3 8-Bit Timer Interrupts ····································································································218
11-4 Priority Order of Timer Output ······················································································223
11-5 Effect of Changing Internal Clock Sources ···································································223
12-1 Output Pins of PWM Timer Module ·············································································228
12-2 PWM Timer Registers ···································································································229
12-3 PWM Timer Parameters for 10MHz System Clock ······················································232
13-1 Register Configuration ···································································································236
13-2 Read Addresses of TCNT and TCSR ············································································240
14-1 SCI Input/Output Pins ····································································································247
14-2 SCI Registers ·················································································································247
14-3 Examples of BRR Settings in Asynchronous Mode (1) ················································255
14-3 Examples of BRR Settings in Asynchronous Mode (2) ················································256
14-3 Examples of BRR Settings in Asynchronous Mode (3) ················································256
14-3 Examples of BRR Settings in Asynchronous Mode (4) ················································257
14-4 Examples of BRR Settings in Synchronous Mode ························································258
14-5 Communication Formats Used by SCI ··········································································259
14-6 SCI Clock Source Selection ···························································································259
14-7 Data Formats in Asynchronous Mode ···········································································261
14-8 Receive Errors ················································································································264
14-9 SCI Interrupts ·················································································································269
14-10 SSR Bit States and Data Transfer When Multiple Receive Errors Occur ·····················270
15-1 A/D Input Pins ···············································································································275
15-2 A/D Registers ·················································································································275
15-3 Assignment of Data Registers to Analog Input Channels ·············································276
15-4 A/D Conversion Time (Single Mode) ············································································288
16-1 RAM Control Register ···································································································292
17-1 ROM Usage in Each MCU Mode ··················································································295
17-2 Selection of PROM Mode ······························································································296
17-3 Socket Adapter ···············································································································297
17-4 Selection of Sub-Modes in PROM Mode ······································································299
17-5 DC Characteristics
(When VCC = 6.0V ±0.25V, VPP = 12.5V ±0.3V, VSS = 0V, Ta = 25˚C ±5˚C) ············301
17-6 AC Characteristics
(When VCC = 6.0V ±0.25V, VPP = 12.5V ±0.3V, Ta = 25˚C ±5˚C) ······························301
17-7 Erasing Conditions ·········································································································304
17-8 Socket for 84-Pin LCC Package ····················································································305
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