Hitachi H8/500 Series - Page 363

Table A-3 Operation Codes in Byte 2 (Axxx)
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
LO
HI
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
0
BSET (Immediate specification of bit number)
b0
b1
b2
b3
b4
b5
b6
b7
b8
b9
b10
b11
b12
b13
b14
b15
R0
R1
R2
R3
R4
R5
R6
R7
R0
R1
R2
R3
R4
R5
R6
R7
SWAP
EXTS
EXTU
CLR
NEG
NOT
TST
TAS
SHAL
SHAR
SHLR
ROTL
ROTR
ROTXL
ROTXR
See
Tbl.
A-6*
SHLL
ADD
ADD:Q
#1
ADD:Q
#-1
ADD:Q
#2
ADD:Q
#-2
ADDS
Note: *
The operation code is in byte 3, given in table A-6.
BSET (Register indirect specification of bit number)
STC
SUBS
BCLR (Register indirect specification of bit number)
BNOT (Register indirect specification of bit number)
BTST (Register indirect specification of bit number)
LDC
DIVXU
MULXU
XCH
SUB
OR
AND
XOR
CMP
MOV
ADDX
SUBX
BCLR (Immediate specification of bit number)
BNOT (Immediate specification of bit number)
BTST (Immediate specification of bit number)
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