Hitachi H8/500 Series - Page 364

Table A-4 Operation Codes in Byte 2 (05xx, 15xx, 0Dxx, 1Dxx, Bxxx, Cxxx, Dxxx, Exxx, Fxxx)
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
LO
HI
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
0
BSET (Register indirect specification of bit number)
CLR
NEG
NOT
TST
TAS
SHAL
SHAR
SHLR
ROTL
ROTR
ROTXL
ROTXR
See
Tbl.
A-6*
SHLL
ADD:Q
#1
ADD:Q
#-1
ADD:Q
#2
ADD:Q
#-2
STC
Note: * The operation code is in byte 3, given in table A-6.
#xx:16
#xx:16
#xx:8
#xx:8
(load)
(store)
CMP
CMP
MOV
MOV
MOV
ADD
SUB
OR
AND
XOR
CMP
MOV
ADDX
SUBX
ADDS
SUBS
BCLR (Register indirect specification of bit number)
BNOT (Register indirect specification of bit number)
BTST (Register indirect specification of bit number)
LDC
DIVXU
MULXU
BSET (Immediate specification of bit number)
BCLR (Immediate specification of bit number)
BNOT (Immediate specification of bit number)
BTST (Immediate specification of bit number)
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