Table 1-4 Pin Functions (cont)
Pin No.
CP-84,
Type Symbol CG-84 FP-80A I/O Name and Function
System BREQ 6 75 I Bus Request: Sent by an external device to the
control H8/532 chip to request the bus right.
STBY 20 9 I Standby: A transition to the hardware standby
mode (a power-down state) occurs when a Low
input is received at the STBY pin.
RES 21 10 I Reset: A Low input causes the H8/532 chip to
reset.
Address A
19 – A0 54 – 43 41 – 30 O Address Bus: Address output pins.
bus 40 – 33 28 – 21
Data bus D
7 – D0 32 – 25 20 – 13 I/O Data Bus: 8-Bit bidirectional data bus.
Bus WAIT 7 76 I Wait: Requests the CPU to insert one or more Tw
control states when accessing an off-chip address.
AS 11 80 O Address Strobe: Goes Low to indicate that there
is a valid address on the address bus.
R/W 12 1 O Read/Write: Indicates whether the CPU is reading
or writing data on the bus.
• High—Read
• Low—Write
DS 13 2 O Data Strobe: Goes Low to indicate the presence of
valid data on the data bus.
RD 14 3 O Read: Goes Low to indicate that the CPU is reading
an external address.
WR 15 4 O Write: Goes Low to indicate that the CPU is
writing to an external address.
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