Hitachi H8/500 Series - Page 427

C.7 Schematic Diagram of Port 7
Figure C-7 (a) to (e) gives a schematic view of the port 7 input/output circuits.
Table C-7 (a) Port 7 Port Read (Pin P70)
Setting Port Read Data
DDR = 0 Pin value
DDR = 1 DR value
RP7
P7
0
WP7
8-Bit timer module
Input clock
WP7D:
WP7:
RP7:
Write to P7DDR
Write to Port 7
Read Port 7
Internal data bus (PDB8)
C
R
QD
P7 DR
0
C
R1
QD
P7 DDR
0
Reset
Reset
WP7D
Figure C-7 (a) Schematic Diagram of Port 7, Pin P70
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