Intel Stratix 10 User Manual

Channels FEC Block Mode FEC Receives Data From
6 to 7 Bypass EHIP_LANE
8 to 9 Fractured EHIP_LANE
10 to 11 Fractured FPGA core
Figure 47. Example Channel Configurations Implementing Various FEC Modes using the
E-Tile Channel Placement Tool
Your implementation could vary depending on your intended application. Check Table 38 on page 82 for
configuration description.
3. Intel Stratix 10 E-Tile Transceiver PHY Architecture
UG-20056 | 2019.02.04
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10 E-Tile Transceiver PHY User Guide
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Intel Stratix 10 Specifications

General

Brand	Intel
Model	Stratix 10
Category	Control Unit
Language	English