Because RFL™ and Hubbell® have a policy of continuous product improvement, we reserve the right to change designs and specifications without notice.
RFL DA-291B RFL Electronics Inc.
April 13, 2010 17 (973) 334-3100
TRANSMIT INTERFACE
There are four independent transmitters, one for each channel. The serial data from the user equipment
is routed to the transmit circuit where it is over-sampled by the baud clock. The length of a character
can be 9, 10 or 11 bits, including start, stop, parity and the data bits. An asynchronous-to-synchronous
converter that complies with the CCITT Recommendation V.14 is used to synchronize the
(asynchronous) serial stream to the (synchronous) T1/E1 network. This synchronized data is then
formatted to the CCIT Recommendation V.110 frame structure and then transmitted into the T1/E1
data stream on the set timeslot (and bit position). Note that the control signal inputs are not supported
and the data flow is always assumed to be constant.
RECEIVE INTERFACE
There are four independent receivers, one for each channel. The incoming serial data stream is
received from the T1/E1 bus by the receive interface and routed to the CCITT Recommendation V.110
framer. The data is extracted when framers at each end of the network are synchronized. The data is
then converted from synchronous-to-asynchronous format by means of CCITT Recommendation V.14
conversion. A baud clock locked to the T1/E1 receiver is used to generate the asynchronous data
output to the user equipment. Flow control is handled by the transmitter-end providing status to the
receiver-end. The receiver-end will reduce the stop-bit length per specification to prevent a buffer
over flow condition.
SCB INTERFACE
The SCB interface circuit communicates with the CM4 module via the SCB (Serial Control Bus). A
DIP switch is provided to allow the user to set the SCB address of the module which is read by the
SCB FPGA. Each module installed in the chassis will have a unique SCB address. The DA-291B has
a type ID of 245 encoded into the SCB FPGA device. The CM-4 module periodically interrogates the
DA-291B to read its status information. The configuration is also read by the CM-4 if the DA-291B is
set for “local” mode of operation, but is written by the CM-4 if the DA-291B is set for “remote” mode
of operation. A DIP switch is set by the user for either “local” or “remote.”
BAUD GENERATOR
There are two baud (clock) generator circuits, one for each of the T1/E1 buses. The frequency of these
clocks is either 18.528MHz for T1 systems or 24.576MHz for E1 systems. The receive bus setting for
a channel determines which of the two clocks is being used as the baud clock source. Each of the four
channels includes an independent circuit that generates a “BAUD_ENABLE” from the baud clock that
is exactly 16X the set baud rate. Both the transmitter and the receiver interfaces use the
“BAUD_ENABLE” (along with the baud clock) to sample and generate the serial data respectively.
LOCAL/REMOTE LOOPBACKS
The loopback logic resides inside the Actel APA-450 FPGA.
To Next Page
Loading...