R.1.117
Date Code 20111215 Reference Manual SEL-421 Relay
Protection Functions
Circuit Breaker Failure Protection
Failure to Interrupt
Fault Current:
Scheme 2
Scheme 2 actually consists of two discrete circuit breaker failure protection
schemes. The first scheme is applied for multiphase faults; apply a short time
delay on pickup prior to asserting the circuit breaker failure trip since three-
phase faults are the greatest threat to transient power system stability. The
second scheme is applied for single phase-to-ground faults; an additional
timer is provided so you can coordinate retripping and circuit breaker failure
tripping for the different fault types.
Circuit Breaker Failure Protection Logic: MultiPhase Faults
The logic diagram shown in Figure 1.73 applies to three-pole tripping for one
or two circuit breakers. Use this logic when the protected circuit breaker fails
following a three-pole trip from the line-relaying scheme.
Fault current causes 50FA1 (Breaker 1 A-Phase Instantaneous Overcurrent
Element) to assert immediately following fault inception and just prior to the
assertion of Relay Word bit BFIA1 (Breaker 1 A-Phase Circuit Breaker
Failure Initiation). At circuit breaker failure initiation, timer BFPU1
(Breaker 1 Circuit Breaker Failure Time Delay on Pickup Timer) starts timing.
If 50FA1 remains asserted when timer BFPU1 expires and at least two of the
three initiation Relay Word bits BFIA1, BFIB1, or BFIC1 are asserted, Relay
Word bit FBF1 (Breaker 1 Circuit Breaker Failure) asserts. (Two of three
asserted initiation Relay Word bits indicate a multi-phase fault.) Use FBF1 in
the circuit breaker failure tripping logic to cause a circuit breaker failure trip
(see Circuit Breaker Failure Trip Logic on page R.1.121). If the protected
circuit breaker opens successfully, 50FA1 drops out before timer BFPU1
expires and Relay Word bit FBF1 does not assert.
Figure 1.73 Scheme 2 Three-Pole Circuit Breaker Failure Protection Logic
Circuit Breaker Failure Protection Logic: Single-Phase Faults
The logic diagram shown in Figure 1.74 applies to single-pole tripping for one
or two circuit breakers. A-phase is discussed; B-phase and C-phase logic is
similar. Use this logic when one pole of the circuit breaker fails following a
single-pole trip from the line-relaying scheme.
Fault current causes 50FA1 (Breaker 1 A-Phase Instantaneous Overcurrent
Element) to assert immediately following ground fault inception and just prior
to the assertion of Relay Word bit BFIA1 (Breaker 1 A-Phase Circuit Breaker
Failure Initiation). At circuit breaker failure initiation timer BFPU1 (Breaker 1
Circuit Breaker Failure Time Delay on Pickup Timer) starts timing. Timer
BFPU1 cascades into timer SPBFPU1 (Breaker 1 Single-Pole Trip Breaker
Failure Time Delay on Pickup Timer). Therefore, use this second timer,
SPBFPU1, to coordinate circuit breaker failure operations for single-pole and
three-pole trips.
If 50FA1 remains asserted when timer SPBFPU1 expires and neither of the
two Relay Word bits BFIB1 and BFIC1 are asserted, Relay Word bit FBFA1
(A-Phase Breaker 1 Circuit Breaker Failure) asserts. Use FBFA1 in the circuit
FBF1
BFIA1
50FA1
BFTB1
BFTC1
BFIA1
BFIB1
BFIC1
FBFC1
FBFB1
FBFA1
BFTA1
Relay
Word
Bit
Relay
Word
Bits
Relay
Word
Bit
Relay
Word
Bits
SELOGIC
Settings
SELOGIC
Setting
BFPU1
0
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