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R.2.65
Date Code 20111215 Reference Manual SEL-421 Relay
Auto-Reclosing and Synchronism Check
Synchronism Check
From Equation 2.3 note that the angle between V
S1
and V
S1
increases for a
greater slip between V
S1
and V
P
(f
S1
–f
P
), a greater Circuit Breaker BK1 close
time setting TCLSBK1, or both in combination.
For any case [(a), (b), (c), or (d)] in Figure 2.31, the location of V
S1
is the
location of V
S1
a period later (this period is setting TCLSBK1, Circuit
Breaker BK1 Close Time). Consider, for example, issuing a close command to
Circuit Breaker BK1. If case (b) in Figure 2.31 represents the time at which
the close command occurs, then V
S1
is the normalized synchronism-check
voltage source position at the instant the close is issued and V
S1
is the
position of V
S1
when Circuit Breaker BK1 actually closes.
Slip Frequency
If the slip frequency exceeds setting 25SFBK1, synchronism check cannot
proceed via element output 25A1BK1. Synchronism check stops because
element output 25A1BK1 deasserts to logical 0 for an out-of-range slip
frequency condition, regardless of other synchronism-check conditions such
as healthy voltage magnitudes.
Synchronism check remains possible (although not necessarily advantageous)
if you use element output 25W1BK1 and the slip frequency exceeds setting
25SFBK1. Synchronism-check element 25W1BK1 does not measure slip. In
this instance, synchronism check occurs (25W1BK1 is logical 1) when the
phase angle difference between reference V
P
and V
S1
is less than angle setting
ANG1BK1.
Synchronism-Check Element Output Effects
A contradiction seems to result from analysis of case (a) in Figure 2.31; it
appears that element output 25A1BK1 should assert to logical 1 because V
S1
is within angle setting ANG1BK1. Note in this case, however, that V
S1
is
approaching synchronism-check reference V
P
. This is where element output
25A1BK1 behaves differently than element output 25W1BK1, for setting
25SFBK1 set to some value other than OFF. As V
S1
approaches V
P
,
25A1BK1 remains deasserted (equals logical 0) until the phase angle
difference between reference V
P
and V
S1
equals zero degrees.
At this zero degrees difference between V
P
and V
S1
point, element output
25A1BK1 asserts to logical 1. We know the systems will truly be in
synchronism (0 degrees between reference V
P
and V
S1
) a period later (this
period is setting TCLSBK1, Circuit Breaker BK1 Close Time). Thus, if a
close command occurs right at the instant that element output 25A1BK1
asserts to logical 1, then there will be a zero degree phase angle difference
across Circuit Breaker BK1 when Circuit Breaker BK1 actually closes.
Closing Circuit Breaker BK1 at a phase angle difference of 0 degrees between
reference V
P
and V
S1
minimizes system shock when you bring two
asynchronous systems together.
Element output 25A1BK1 remains asserted to logical 1 as V
S1
moves away
from reference V
P
. When the phase angle difference between reference V
P
and
V
S1
is again greater than angle setting ANG1BK1, element output 25A1BK1
deasserts to logical 0.

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