ST STM32WL55JC User Manual

Real-time clock (RTC) RM0453
1030/1454 RM0453 Rev 2
32.6.21 RTC alarm A binary mode register (RTC_ALRABINR)
This register can be written only when ALRAE is reset in RTC_CR register, or in initialization
mode.
Address offset: 0x70
Backup domain reset value: 0x0000 0000
System reset: not affected
32.6.22 RTC alarm B binary mode register (RTC_ALRBBINR)
This register can be written only when ALRBE is reset in RTC_CR register, or in initialization
mode.
Address offset: 0x74
Backup domain reset value: 0x0000 0000
System reset: not affected
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
SS[31:16]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
1514131211109876543210
SS[15:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:0 SS[31:0]: Synchronous counter alarm value in Binary mode
This value is compared with the contents of the synchronous counter to determine if Alarm A
is to be activated. Only bits 0 up MASKSS-1 are compared.
SS[14:0] is the mirror of SS[14:0] in the RTC_ALRMASSRR, and so can also be read or
written through RTC_ALRMASSR.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
SS[31:16]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
1514131211109876543210
SS[15:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:0 SS[31:0]: Synchronous counter alarm value in Binary mode
This value is compared with the contents of the synchronous counter to determine if Alarm
Bis to be activated. Only bits 0 up MASKSS-1 are compared.
SS[14:0] is the mirror of SS[14:0] in the RTC_ALRMBSSRR, and so can also be read or
written through RTC_ALRMBSSR.

ST STM32WL55JC Specifications

General

Brand	ST
Model	STM32WL55JC
Category	Microcontrollers
Language	English