Contents RM0453
40/1454 RM0453 Rev 2
38.8.3 CPU1 ROM CoreSight peripheral identity register 0 (ROM_PIDR0) . 1379
38.8.4 CPU1 ROM CoreSight peripheral identity register 1 (ROM_PIDR1) . 1380
38.8.5 CPU1 ROM CoreSight peripheral identity register 2 (ROM_PIDR2) . 1380
38.8.6 CPU1 ROM CoreSight peripheral identity register 3 (ROM_PIDR3) . 1381
38.8.7 CPU1 ROM CoreSight component identity register 0 (ROM_CIDR0) 1381
38.8.8 CPU1 ROM CoreSight peripheral identity register 1 (ROM_CIDR1) . 1382
38.8.9 CPU1 ROM CoreSight component identity register 2 (ROM_CIDR2) 1382
38.8.10 CPU1 ROM CoreSight component identity register 3 (ROM_CIDR3) 1383
38.8.11 CPU1 ROM table register map and reset values . . . . . . . . . . . . . . . . 1383
38.9 CPU1 breakpoint unit (FPB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1384
38.9.1 FPB control register (FPB_CTRLR) . . . . . . . . . . . . . . . . . . . . . . . . . . 1384
38.9.2 FPB remap register (FPB_REMAPR) . . . . . . . . . . . . . . . . . . . . . . . . 1385
38.9.3 FPB comparator register x (FPB_COMPxR) . . . . . . . . . . . . . . . . . . . 1385
38.9.4 FPB CoreSight peripheral identity register 4 (FPB_PIDR4) . . . . . . . 1386
38.9.5 FPB CoreSight peripheral identity register 0 (FPB_PIDR0) . . . . . . . 1387
38.9.6 FPB CoreSight peripheral identity register 1 (FPB_PIDR1) . . . . . . . 1387
38.9.7 FPB CoreSight peripheral identity register 2 (FPB_PIDR2) . . . . . . . 1388
38.9.8 FPB CoreSight peripheral identity register 3 (FPB_PIDR3) . . . . . . . 1388
38.9.9 FPB CoreSight component identity register 0 (FPB_CIDR0) . . . . . . 1389
38.9.10 FPB CoreSight peripheral identity register 1 (FPB_CIDR1) . . . . . . . 1389
38.9.11 FPB CoreSight component identity register 2 (FPB_CIDR2) . . . . . . 1390
38.9.12 FPB CoreSight component identity register 3 (FPB_CIDR3) . . . . . . 1390
38.9.13 CPU1 FPB register map and reset values . . . . . . . . . . . . . . . . . . . . . 1390
38.10 CPU1 instrumentation trace macrocell (ITM) . . . . . . . . . . . . . . . . . . . . 1392
38.10.1 ITM stimulus register x (ITM_STIMRx) . . . . . . . . . . . . . . . . . . . . . . . 1392
38.10.2 ITM trace enable register (ITM_TER) . . . . . . . . . . . . . . . . . . . . . . . . 1393
38.10.3 ITM trace privilege register (ITM_TPR) . . . . . . . . . . . . . . . . . . . . . . . 1393
38.10.4 ITM trace control register (ITM_TCR) . . . . . . . . . . . . . . . . . . . . . . . . 1394
38.10.5 ITM CoreSight peripheral identity register 4 (ITM_PIDR4) . . . . . . . . 1395
38.10.6 ITM CoreSight peripheral identity register 0 (ITM_PIDR0) . . . . . . . . 1395
38.10.7 ITM CoreSight peripheral identity register 1 (ITM_PIDR1) . . . . . . . . 1396
38.10.8 ITM CoreSight peripheral identity register 2 (ITM_PIDR2) . . . . . . . . 1396
38.10.9 ITM CoreSight peripheral identity register 3 (ITM_PIDR3) . . . . . . . . 1397
38.10.10 ITM CoreSight component identity register 0 (ITM_CIDR0) . . . . . . . 1397
38.10.11 ITM CoreSight peripheral identity register 1 (ITM_CIDR1) . . . . . . . . 1398
38.10.12 ITM CoreSight component identity register 2 (ITM_CIDR2) . . . . . . . 1398
38.10.13 ITM CoreSight component identity register 3 (ITM_CIDR3) . . . . . . . 1399
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