General-purpose I/Os (GPIO) RM0453
420/1454 RM0453 Rev 2
10.4.29 GPIO H bit set/reset register (GPIOH_BSRR)
Address offset: 0x1C18
Reset value: 0x0000 0000
10.4.30 GPIOH configuration lock register (GPIOH_LCKR)
Address offset: 0x1C1C
Reset value: 0x0000 0000
This register is used to lock the configuration of the port bits when a correct write sequence
is applied to bit 16 (LCKK). The value of bits [15:0] is used to lock the configuration of the
GPIO. During the write sequence, the value of LCKR[15:0] must not change. When the lock
sequence has been applied on a port bit, the value of this port bit can no longer be modified
until the next MCU reset or peripheral reset.
Note: A specific write sequence is used to write to the GPIOH_LCKR register. Only word access
(32-bit long) is allowed during this locking sequence.
Each lock bit freezes a specific configuration register (control and alternate function
registers).
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. BR3 Res. Res. Res.
rc_w1
1514131211109876543210
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. BS3 Res. Res. Res.
rc_w1
Bits 31:20 Reserved, must be kept at reset value.
Bit 19 BR3: Port PH3 reset output data bit [3] in GPIOH_ODR
This bit is read clear-write 1. A read to this bit returns the value 0.
0: No action on the corresponding GPIOH_ODR.OD3
1: Resets the corresponding GPIOH_ODR.OD3.
Note: If both BS3 and BR3 are set, BS3 has priority.
Bits 18:4 Reserved, must be kept at reset value.
Bit 3 BS3: Port PH3 set output data bit [3] in GPIOH_ODR
This bit is read clear-write 1. A read to this bit returns the value 0.
0: No action on the corresponding GPIOH_ODR.OD3
1: Sets the corresponding GPIOH_ODR.OD3.
Bits 2:0 Reserved, must be kept at reset value.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. LCKK
rw
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. LCK3 Res. Res. Res.
rw
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