RM0453 Rev 2 507/1454
RM0453 Extended interrupts and event controller (EXTI)
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16.3 EXTI connections between peripherals and CPU
The peripherals able to generate wakeup or interrupt events when the system is in Stop
mode, are connected to the EXTI.
Peripheral wakeup signals that generate a pulse or that do not have an interrupt status bits
in the peripheral, are connected to an EXTI configurable event input. For these events, the
EXTI provides a status pending bit which requires to be cleared. It is the EXTI interrupt
associated with the status bit that interrupts the CPU.
Peripheral interrupt and wakeup signals that have a status bit in the peripheral which
requires to be cleared in the peripheral, are connected to an EXTI direct event input. There
is no status pending bit within the EXTI. The interrupt or wakeup is cleared by the CPU in
the peripheral. It is the peripheral interrupt that interrupts the CPU directly.
The EXTI configurable event interrupts are connected to the NVIC of the CPU.
The dedicated EXTI/EVG CPU event is connected to the CPU rxev input.
The EXTI CPU wakeup signals are connected to the PWR block and are used to wake up
the system and CPU sub-system bus clocks.
16.3.1 EXTI wakeup interrupt list
The wakeup sources are listed in Table 93: Wakeup interrupts.
Some wakeup sources are able to generate an event to the CPU (see ‘Event’ column).
The wakeup source capability to wake up a CPU is noted in Wakeup column.
For CPU interrupt handling, see Section 15: Nested vectored interrupt controller (NVIC).
Table 93. Wakeup interrupts
EXTI
n
o
Acronym Description EXTI type Event Wakeup
0 EXTI[0] EXTI line 0 from SYSCFG Configurable Yes CPU1 and CPU2
1 EXTI[1] EXTI line 1 from SYSCFG Configurable Yes CPU1 and CPU2
2 EXTI[2] EXTI line 2 from SYSCFG Configurable Yes CPU1 and CPU2
3 EXTI[3] EXTI line 3 from SYSCFG Configurable Yes CPU1 and CPU2
4 EXTI[4] EXTI line 4 from SYSCFG Configurable Yes CPU1 and CPU2
5 EXTI[5] EXTI line 5 from SYSCFG Configurable Yes CPU1 and CPU2
6 EXTI[6] EXTI line 6 from SYSCFG Configurable Yes CPU1 and CPU2
7 EXTI[7] EXTI line 7 from SYSCFG Configurable Yes CPU1 and CPU2
8 EXTI[8] EXTI line 8 from SYSCFG Configurable Yes CPU1 and CPU2
9 EXTI[8] EXTI line 9 from SYSCFG Configurable Yes CPU1 and CPU2
10 EXTI[10] EXTI line 10 from SYSCFG Configurable Yes CPU1 and CPU2
11 EXTI[11] EXTI line 11 from SYSCFG Configurable Yes CPU1 and CPU2
12 EXTI[12] EXTI line 12 from SYSCFG Configurable Yes CPU1 and CPU2
13 EXTI[13] EXTI line 13 from SYSCFG Configurable Yes CPU1 and CPU2
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