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General-purpose timer (TIM2) RM0453

890/1454 RM0453 Rev 2

26.4.24 TIM2 timer input selection register (TIM2_TISEL)

Address offset: 0x68

Reset value: 0x0000 0000

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. ETRSEL[3:2]

rw rw

1514131211109876543210

ETRSEL[1:0] Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.

rw rw

Bits 31:18 Reserved, must be kept at reset value.

Bits 17:14 ETRSEL[3:0]: ETR source selection

These bits select the ETR input source.

0000: GPIO or LSE internal clock, as per ETR_RMP bit in TIM2_OR1

0001: COMP1

0010: COMP2

Others: Reserved

Bits 13:0 Reserved, must be kept at reset value.

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.

1514131211109876543210

Res. Res. Res. Res. TI2SEL[3:0] Res. Res. Res. Res. TI1SEL[3:0]

rw rw rw rw rw rw rw rw

Bits 31:12 Reserved, must be kept at reset value.

Bits 11:8 TI2SEL[3:0]: TI2[0] to TI2[15] input selection

These bits select the TI2[0] to TI2[15] input source.

0000: TIM2_CH2 input

Others: Reserved

Bits 7:4 Reserved, must be kept at reset value.

Bits 3:0 TI1SEL[3:0]: TI1[0] to TI1[15] input selection

These bits select the TI1[0] to TI1[15] input source.

0000: TIM2_CH1 input

Others: Reserved

ST STM32WL55JC User Manual

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