Xilinx SelectIO 7 Series - Page 102

102 www.xilinx.com 7 Series FPGAs SelectIO Resources User Guide
UG471 (v1.10) May 8, 2018
Chapter 1: SelectIO Resources
HSLVDCI_15 HP N/A N/A Yes Driver None
HSLVDCI_18 HP N/A N/A Yes Driver None
HSTL_I Both N/A SLOW, FAST No None None
HSTL_I_12 HP N/A SLOW, FAST No None None
HSTL_I_18 Both N/A SLOW, FAST No None None
HSTL_I_DCI HP N/A SLOW, FAST No None Split
HSTL_I_DCI_18 HP N/A SLOW, FAST No None Split
HSTL_II Both N/A SLOW, FAST Yes None None
HSTL_II_18 Both N/A SLOW, FAST Yes None None
HSTL_II_DCI HP N/A SLOW, FAST Yes Split Split
HSTL_II_DCI_18 HP N/A SLOW, FAST Yes Split Split
HSTL_II_T_DCI HP N/A SLOW, FAST Required None Split
HSTL_II_T_DCI_18 HP N/A SLOW, FAST Required None Split
HSUL_12 Both N/A SLOW, FAST Yes None None
HSUL_12_DCI HP N/A SLOW, FAST Yes Driver None
LVCMOS12 Both
HP: 2, 4, 6, 8
HR: 4, 8, 12
SLOW, FAST Yes None None
LVCMOS15 Both
HP: 2, 4, 6, 8, 12, 16
HR: 4, 8, 12, 16
SLOW, FAST Yes None None
LVCMOS18 Both
HP: 2, 4, 6, 8, 12, 16
HR: 4, 8, 12, 16, 24
SLOW, FAST Yes None None
LVCMOS25 HR 4, 8, 12, 16 SLOW, FAST Yes None None
LVCMOS33 HR 4, 8, 12, 16 SLOW, FAST Yes None None
LVDCI_15 HP N/A N/A Yes Driver None
LVDCI_18 HP N/A N/A Yes Driver None
LVDCI_DV2_15 HP N/A N/A Yes Driver None
LVDCI_DV2_18 HP N/A N/A Yes Driver None
LVDS HP N/A N/A Yes None None
LVDS_25 HR N/A N/A Yes
(3)
None None
SSTL12 HP N/A SLOW, FAST Yes None None
SSTL12_DCI HP N/A SLOW, FAST No None Split
SSTL12_T_DCI HP N/A SLOW, FAST Required None Split
LVTTL HR 4, 8, 12, 16, 24 SLOW, FAST Yes None None
Table 1-56: DRIVE and SLEW Attributes, Bidirectional Buffers, and DCI Termination Type (Cont’d)
I/O Standard
I/O Bank
Availability
DRIVE (mA) SLEW
Bidirectional
Buffers
(1)
DCI Type
(2)
Outputs Outputs Outputs Inputs
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