Xilinx SelectIO 7 Series User Manual

70 www.xilinx.com 7 Series FPGAs SelectIO Resources User Guide
UG471 (v1.10) May 8, 2018
Chapter 1: SelectIO Resources
Figure 1-53 shows a sample circuit illustrating a termination technique for differential
HSTL class-II (1.5V or 1.8V) with bidirectional termination. In a specific circuit, all drivers
and receivers must be at the same voltage level (either 1.5V or 1.8V); they are not
interchangeable.
X-Ref Target - Figure 1-53
Figure 1-53: Differential HSTL Class II (1.5V or 1.8V) Bidirectional Termination
Z
0
IOB
IOB
DIFF_HSTL_II
DIFF_HSTL_II_18
DIFF_HSTL_II
DIFF_HSTL_II_18
DIFF_HSTL_II
DIFF_HSTL_II_18
DIFF_HSTL_II
DIFF_HSTL_II_18
DIFF_HSTL_II
DIFF_HSTL_II_18
DIFF_HSTL_II
DIFF_HSTL_II_18
+
–
External Termination
50Ω
ug471_c1_43_011811
Z
0
+
–
50ϖ
V
TT
=
0.75V for DIFF_HSTL_II
0.9V for DIFF_HSTL_II_18
V
TT
=
0.75V for DIFF_HSTL_II
0.9V for DIFF_HSTL_II_18
V
TT
=
0.75V for DIFF_HSTL_II
0.9V for DIFF_HSTL_II_18
V
TT
=
0.75V for DIFF_HSTL_II
0.9V for DIFF_HSTL_II_18
50Ω
50Ω
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Xilinx SelectIO 7 Series Specifications

General

Brand	Xilinx
Model	SelectIO 7 Series
Category	Computer Hardware
Language	English