COBHAM GR712RC User Manual

GR712RC-UM, Jun 2017, Version 2.9 187 www.cobham.com/gaisler
GR712RC
26.3.3 De-Randomiser
In order to maintain bit synchronisation with the received telecommand signal, the incoming signal
must have a minimum bit transition density. If a sufficient bit transition density is not ensured for the
channel by other methods, the randomiser is required. Its use is optional otherwise. The presence or
absence of randomisation is fixed for a physical channel and is managed (i.e., its presence or absence
is not signalled but must be known a priori by the spacecraft and ground system). A random sequence
is exclusively OR-ed with the input data to increase the frequency of bit transitions. On the receiving
end, the same random sequence is exclusively OR-ed with the decoded data, restoring the original
data form. At the receiving end, the de-randomisation is applied to the successfully decoded data. The
de-randomiser remains in the “all-ones” state until the Start Sequence has been detected. The pattern
is exclusively OR-ed, bit by bit, to the successfully decoded data (after the Error Control Bits have
been removed). The de-randomiser is reset to the “all-ones” state following a failure of the decoder to
successfully decode a codeblock or other loss of input channel.
26.3.4 Non-Return-to-Zero – Mark
An optional Non-Return-to-Zero – Mark decoder can be enabled by means of a register.
26.3.5 Design specifics
The coding layer is supporting channel inputs ([PSS-04-151] requires at least 4).
A codeblock is fixed to 56 information bits (as per CCSDS/ECSS).
The CCSDS/ECSS (1024 octets) or [PSS-04-151] (256 octets) standard maximum frame lengths are
supported, being programmable via bit PSS in the GCR register. The former allows more than 37
codeblocks to be received.
The Frame Analysis Report (FAR) interface supports 8 bit CAC field, as well as the 6 bit CAC field
specified in [PSS-04-151]. When the PSS bit is cleared to '0', the two most significant bits of the CAC
will spill over into the "LEGAL/ILLEGAL" FRAME QUALIFIER field in the FAR. These bits will
however be all-zero when [PSS-04-151] compatible frame lengths are received or the PSS bit is set to
'1'. The saturation is done at 6 bits when PSS bit is set to '1' and at 8 bits when PSS bit is cleared to '0'.
The Pseudo-Randomiser decoder is included (as per CCSDS/ECSS), its usage being programmable.
The Physical Layer input can be NRZ-L or NRZ-M modulated, allowing for polarity ambiguity. NRZ-
L/M selection is programmable. This is an extension to ECSS: Non-Return to Zero - Mark decoder
added, with its internal state reset to zero when channel is deactivated.
Note: If input clock disappears, it will also affect the codeblock acquired immediately before the
codeblock just being decoded (accepted by [PSS-04-151]).
In state S1, all active inputs are searched for start sequence, there is no priority search, only round
robin search. The search for the start sequence is sequential over all inputs: maximum input frequency
= system frequency / 7.
The [PSS-04-151] specified CASE-1 and CASE-2 actions are implemented according to aforemen-
tioned specification, not leading to aborted frames.
Extended E2 handling is implemented:
• E2b Channel Deactivation - selected input becomes inactive in S3
• E2c Channel Deactivation - too many codeblocks received in S3
• E2d Channel Deactivation - selected input is timed-out in S3 
(design choice being: S3 => S1, abandoned frame)

COBHAM GR712RC Specifications

General

Brand	COBHAM
Model	GR712RC
Category	Computer Hardware
Language	English