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COBHAM GR712RC User Manual

COBHAM GR712RC
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GR712RC-UM, Jun 2017, Version 2.9 194 www.cobham.com/gaisler
GR712RC
ing register has been read out by software, it should be masked in the interrupt controller to avoid
an immediate second interrupt).
‘Receiver overrun’ (generated when received data is dropped due to a reception overrun)
‘CLTU ready’ (note that this interrupt is also issued for abandoned CLTUs)
FAR interrupt ‘Status Survey Data’
CLCW interrupt ‘Bit Lock’
CLCW interrupt ‘RF Available’
26.8 Miscellaneous
26.8.1 Numbering and naming conventions
Convention according to the CCSDS recommendations, applying to time structures:
The most significant bit of an array is located to the left, carrying index number zero.
An octet comprises eight bits.
Convention according to AMBA specification, applying to the APB/AHB interfaces:
Signal names are in upper case, except for the following:
A lower case 'n' in the name indicates that the signal is active low.
Constant names are in upper case.
The least significant bit of an array is located to the right, carrying index number zero.
Big-endian support.
General convention, applying to all other signals and interfaces:
Signal names are in mixed case.
An upper case '_N' suffix in the name indicates that the signal is active low.
Table 204.CCSDS n-bit field definition
CCSDS n-bit field
most significant least significant
01 to n-2 n-1
Table 205.AMBA n-bit field definition
AMBA n-bit field
most significant least significant
n-1 n-2 down to 1 0

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COBHAM GR712RC Specifications

General IconGeneral
BrandCOBHAM
ModelGR712RC
CategoryComputer Hardware
LanguageEnglish

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