COBHAM GR712RC User Manual

GR712RC-UM, Jun 2017, Version 2.9 214 www.cobham.com/gaisler
GR712RC
• Pseudo-Randomiser
• Non-Return-to-Zero Mark encoder
The output from the Convolutional Encoder (CE) can be connected to:
• Split-Phase Level modulator
• Sub-Carrier modulator
The input to the Split-Phase Level modulator (SP) can be connected to:
• Packet Telemetry and AOS encoder
• Reed-Solomon encoder
• Pseudo-Randomiser
• Non-Return-to-Zero Mark encoder
• Convolutional encoder
The output from the Split-Phase Level modulator (SP) can be connected to:
• Sub-Carrier modulator
The input to the Sub-Carrier modulator (SC) can be connected to:
• Packet Telemetry and AOS encoder
• Reed-Solomon encoder
• Pseudo-Randomiser
• Non-Return-to-Zero Mark encode
• Convolutional encoder
• Split-Phase Level modulator
27.8 Operation
27.8.1 Introduction
The DMA interface provides a means for the user to insert Transfer Frames in the Packet Telemetry
and AOS Encoder. Depending on which functions are enabled in the encoder, the various fields of the
Transfer Frame are overwritten by the encoder. It is also possible to bypass some of these functions
for each Transfer Frame by means of the control bits in the descriptor associated to each Transfer
Frame. The DMA interface allows the implementation of Virtual Channel Frame Service and Master
Channel Frame Service, or a mixture of both, depending on what functions are enabled or bypassed.
27.8.2 Descriptor setup
The transmitter DMA interface is used for transmitting transfer frames on the downlink. The trans-
mission is done using descriptors located in memory.
A single descriptor is shown in table 223 and 224. The number of bytes to be sent is set globally for
all transfer frames in the length field in register DMA length register. The the address field of the
descriptor should point to the start of the transfer frame. The address must be word-aligned. If the
interrupt enable (IE) bit is set, an interrupt will be generated when the transfer frame has been sent
(this requires that the transmitter interrupt enable bit in the control register is also set). The interrupt
will be generated regardless of whether the transfer frame was transmitted successfully or not. The
wrap (WR) bit is also a control bit that should be set before transmission and it will be explained later

COBHAM GR712RC Specifications

General

Brand	COBHAM
Model	GR712RC
Category	Computer Hardware
Language	English