COBHAM GR712RC User Manual

GR712RC-UM, Jun 2017, Version 2.9 193 www.cobham.com/gaisler
GR712RC
26.6 Command Link Control Word interface (CLCW)
The Command Link Control Word (CLCW) is inserted in the Telemetry Transfer Frame by the Telem-
etry Encoder (TM) when the Operational Control Field (OCF) use is enabled. The CLCW needs to be
created by the software part of the telecommand decoder and to be written by software to the GRTM
OCF register in the Telemetry Encoder.
The telecommand decoder hardware provides two CLCW registers through which bit 16 (No RF
Available) and 17 (No Bit Lock) of the CLCW can be read by the telecommand decoder software. The
information carried in these bits is based on the discrete inputs TCRFAVL[4:0] and TCACT[4:0]
respectively, where the multiple inputs are OR-ed before being assigned to the two bits. Note that if
these telecommand input signals are shared with other functions via the I/O switch matrix, then the
values of bit 16 and 17 might reflect the status of the transponders incorrectly. The other bits of the
CLCW registers have no impact on any hardware more than providing a temporary storage place that
software may utilize.
Note that the two corresponding bits can also be automatically overwritten in the OCF part of the
Telemetry Transfer Frame by the Telemetry Encoder (GRTM) hardware if enabled through the Over
Write OCF (OW) bit in the GRTM master frame generation register. This provides the same function-
ality as reading the bits through the CLCW registers in the telecommand decoder and then writing
them to the GRTM OCF register in the Telemetry Encoder.
26.7 Configuration Interface (AMBA AHB slave)
The AMBA AHB slave interface supports 32 bit wide data input and output. Since each access is a
word access, the two least significant address bits are assumed always to be zero, address bits 23:0 are
decoded. Note that address bits 31:24 are not decoded and should thus be handled by the AHB arbiter/
decoder. The address input of the AHB slave interfaces is thus incompletely decoded. Misaligned
addressing is not supported. For read accesses, unmapped bits are always driven to zero.
The AMBA AHB slave interface has been reduced in function to support only what is required for the
TC. The following AMBA AHB features are constrained:
• Only supports HSIZE=WORD, HRESP_ERROR generated otherwise
• Only supports HMASTLOCK='0', HRESP_ERROR generated otherwise
• Only support HBURST=SINGLE or INCR, HRESP_ERROR generated otherwise
• No HPROT decoding
• No HSPLIT generated
• HRETRY is generated if a register is inaccessible due to an ongoing reset.
• HRESP_ERROR is generated for unmapped addresses, and for write accesses to register without
any writeable bits
• Only big-endianness is supported.
During a channel reset the RRP and RWP registers are temporary unavailable. The duration of this
reset-inactivity is 8 HCLK clock periods and the AHB-slave generates a HRETRY response during
this period if an access is made to these registers.
If the channel reset is initiated by or during a burst-access the reset will execute correctly but a part of
the burst could be answered with a HRETRY response. It is therefore not recommended to initiate
write bursts to the register.
GRTC has one interrupt output, that is asserted on the occurrence of one of following events:
• ‘CLTU stored’ (generated when CLTU has been stored towards the AMBA bus, also issued for
abandoned CLTUs)
• ‘Receive buffer full’ (generated when the buffer has less than 1/8 free) (note that this interrupt is
issued on a static state of the buffer, and can thus be re-issued immediately after the correspond-

COBHAM GR712RC Specifications

General

Brand	COBHAM
Model	GR712RC
Category	Computer Hardware
Language	English