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GR712RC
The 8-bit EDAC protection scheme works independently of the actual size of the physical memory
device that is mounted in the first bank, since the physical memory would simply be replicated over
the complete 256MiB bank space, always locating the upper part of the physical memory device at the
upper part of the bank space. The EDAC checkbytes will be located automatically at power up (espe-
cially for the first word access from address 0x00000000). Thus, it is sufficient to enable the EDAC
protection setting the SWMX[4] input at reset, and then later in the boot sequence one may constrain
the PROM bank size.
5.10.2 Reed-Solomon EDAC
The Reed-Solomon EDAC provides block error correction, and is capable of correcting up to two 4-
bit nibble errors in a 32-bit data word or 16-bit checksum. The Reed-Solomon EDAC can be enabled
for the SDRAM area only, and uses a 16-bit checksum. The Reed-Solomon EDAC is enabled by set-
ting the RSE and RE bits in MCFG3, and the RMW bit in MCFG2.
The Reed-Solomon data symbols are 4-bit wide, represented as GF(2^4). The basic Reed-Solomon
code is a shortened RS(15, 13, 2) code, represented as RS(6, 4, 2). It has the capability to detect and
correct a single symbol error anywhere in the codeword. The EDAC implements an interleaved RS(6,
4, 2) code where the overall data is represented as 32 bits and the overall checksum is represented as
16 bits. The codewords are interleaved nibble-wise. The interleaved code can correct two 4-bit errors
when each error is located in a nibble and not in the same original RS(6, 4, 2) codeword.
The Reed-Solomon RS(15, 13, 2) code has the following definition:
• there are 4 bits per symbol;
• there are 15 symbols per codeword;
• the code is systematic;
• the code can correct one symbol error per codeword;
• the field polynomial is
• the code generator polynomial is
for which the highest power of x is stored first;
• a codeword is defined as 15 symbols:
c
0
, c
1
, c
2
, c
3
, c
4
, c
5
, c
6
, c
7
, c
8
, c
9
, c
10
, c
11
, c
12
, c
13
, c
14
where c
0
to c
12
represent information symbols and c
13
to c
14
represent check symbols.
The shortened and interleaved RS(6, 4, 2) code has the following definition:
• the codeword length is shortened to 4 information symbols and 2 check symbols and as follows:
c
0
= c
1
= c
2
= c
3
= c
4
= c
5
= c
6
= c
7
= c
8
= 0
where the above information symbols are suppressed or virtually filled with zeros;
• two codewords are interleaved (i.e. interleaved depth I=2) with the following mapping to the 32-
bit data and 16-bit checksum, were c
i,j
is a symbol with codeword index i and symbol index j:
c
0,9
= DATA[31:28]
c
1,9
= DATA[27:24]
gx x
i
+
i 0=
1
g
j
x
j
j 0=
2
==