ABB RED650 - Page 243

a<b
a
b
U1<
U
TR1
ST1
IEC09000785-3-en.vsd
t
t1
tReset1
R
t
AND
IEC09000785 V3 EN-US
Figure 106: Logic diagram for step 1, DT operation
U1<
ST1
TR1
tReset1
t1
IEC10000039-3-en.vsd
IEC10000039 V3 EN-US
Figure 107: Example for Definite Time Delay stage1 reset
1MRK 505 394-UEN A Section 9
Voltage protection
Line differential protection RED650 2.2 IEC 237
Technical manual