Cisco D9854 User Manual

4021470 Rev D D9854 Advanced Program Receiver Installation and Operation Guide 6-15
FPGA status Set FPGA Init failed to go
high
Cause: Hardware
issue.
Remedy: Clear
alarms, reset the unit,
notify customer
service if the problem
persists.
FPGA setup
failure or the
FPGA binary
identity does not
match the FPGA
registers.
Major
FPGA Init and Done
failed to go low
FPGA Init went LOW
(CRC error)
FPGA Done failed to
go high
Invalid FPGA data
Invalid PCB version
FPGA mismatch,
required=#.#.#.#,
Running=#.#.#.#
Clear FPGA loaded
successfully and reset
FPGA code ver OK
Alarm Message
Type
Message Cause/Remedy Description Severity

Cisco D9854 Specifications

General

Model	D9854
Category	Receiver
Output	ASI, IP
Decoding	MPEG-2
Conditional Access	BISS
Receiver Type	Professional IRD
解密	DVB-CSA, BISS, AES
Input Frequency Range	950 MHz to 2150 MHz
Modulation Formats	QPSK, 8PSK
Symbol Rate	1 to 45 Msps
Power Supply	100-240 VAC, 50/60 Hz
Power Consumption	40W (typical)
Operating Temperature	0°C