COBHAM GR712RC User Manual

GR712RC-UM, Jun 2017, Version 2.9 178 www.cobham.com/gaisler
GR712RC
6 AMBA ERROR Enable (AERRE) - When this bit is set to ‘1’ the core will generate an interrupt
when an AMBA ERROR event occurs.
5 Receive Overflow Enable (ROVE) - When this bit is set to ‘1’ the core will generate an interrupt
when bit 5 of the Status register is set.
4 Receive Not Empty Enable (RNEE) - When this bit is set to ‘1’ the core will generate an interrupt
when bit 4 of the Status register is set.
3 Transmit Not Full Enable (TNFE) - When this bit is set to ‘1’ the core will generate an interrupt
when bit 3 of the Status register is set.
2 SEQUENCE Completed Enable (SCE) - When this bit is set to ‘1’ the core will generate an interrupt
when bit 2 of the Status register is set.
1 SEQUENCE Aborted Enable (SCE) - When this bit is set to ‘1’ the core will generate an interrupt
when bit 1 of the Status register is set.
0 SLINK Word Received Enable (SRXE) - When this bit is set to ‘1’ the core will generate an interrupt
when bit 0 of the Status register is set.
Reset value: 0x000000UU, where U is undefined
Table 191. GRSLINK Array A Base Address register
31 210
ABASE RESERVED
31:2 Array A Base Address (ABASE) - This field contains bits 31:2 of the address of the fast sequence
array’s first element. This field may only be written when the SEQUENCE Enable bit in the Control
register is ‘0’.
1:0 RESERVED - This field must be written with only zeroes and is always read as zero.
Reset value: Undefined
Table 192. GRSLINK Array B Base Address register
31 210
BBASE RESERVED
31:2 Array B Base Address (BBASE) - This field contains bits 31:2 of the address of the fast sequence
array B’s first element. This field may only be written when the SEQUENCE Enable in the Control
register is ‘0’.
1:0 RESERVED - This field must be written with only zeroes and is always read as zero.
Reset value: Undefined
Table 193. GRSLINK Transmit register
31 24 23 22 16 15 0
RESERVED RW
CHAN. NO Data / Address
31:24 RESERVED - This field is always read as zero, writes have no effect.
23:0 Fields in SLINK data word from master to slave. Reads of this field always return zero. This register
must not be written unless the Transmit Not Full (TNF) bit in the Status register is set.
Reset value: 0x00000000
Table 194. GRSLINK Receive register
31 23 22 21 20 19 16 15 0
RESERVED IO CARD # SPARE CHAN. NO Data
31:23 RESERVED - This field is always read as zero, writes have no effect.
22:0 Fields in SLINK data word from slave to master. This register must not be read unless the Receive
Not Empty (RNE) bit in the Status register is set.
Reset value: Undefined
Table 190. GRSLINK Interrupt Mask register

COBHAM GR712RC Specifications

General

Brand	COBHAM
Model	GR712RC
Category	Computer Hardware
Language	English