Parameter Specification
As of Board Revision
DS1103-09
Up to Board Revision
DS1103-07
ADCs
(parallel)
Channels n 4 parallel channels each equipped with one sample &
hold ADC
n Note: 8 ADC channels (4 x muxed + 4 x parallel) can be
sampled simultaneously
Resolution 16 bit 12 bit
Input voltage range ±10 V
Overvoltage protection ±15 V
Conversion time 800 ns
Offset error ±5 mV
Gain error ±0.25% ±0.5%
Offset drift 40 μV/K
Gain drift 50 ppm/K
Signal‑to‑noise‑ratio >83 dB >65 dB
DACs Channels 8 channels
Resolution 16 bit 14 bit
Output range ±10 V
Settling time 5 μs (14 bit) 5 μs (12 bit)
Offset error ±1 mV
Gain error ±0.5%
Offset drift 30 μV/K
Gain drift 25 ppm/K
Signal‑to‑noise‑ratio >83 dB >78 dB
I
max
±5 mA
C
Imax
10 nF
Digital I/O Channels n 32-bit parallel I/O
n Organized in four 8-bit groups
n Each 8‑bit group can be set to input or output
(programmable by software)
Voltage range TTL input/output levels
I
outmax
±10 mA
s
Data Sheets
t
222
s
DS1103 Hardware Installation and Configuration November 2014
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