Intel Pentium 4 User Manual

Memory Interface Routing
R
112 Intel
®
Pentium
®
4 Processor / Intel
®
850 Chipset Family Platform Design Guide
Figure 74. Rambus Technology Intel
®
MCH Breakout (Bottom Layer)
Bottom
Layer
Channel A
Channel B
6.2.1 Optimized Rambus RDRAM* Device Routing Rules for a
Four-Layer Motherboard Design
This section documents ONLY the routing guideline changes from the general guidelines outlined
in the Intel
®
Pentium
®
4 Processor in the 478 Pin Package / Intel
®
850 Chipset Family Platform
Design Guide.
General optimized routing guidelines that apply to Channel A and
Channel B
• Do NOT implement dummy VIAs on RSL signals routed on the top layer.
• RSL signals routed on the top layer need to be routed 25mils longer than RSL signals on the
bottom layer.

Intel Pentium 4 Specifications

General

Architecture	x86
Core Count	1
Microarchitecture	NetBurst
Manufacturer	Intel
Core Names	Willamette, Northwood, Prescott, Cedar Mill
Virtualization Technology	No
Release Date	November 20, 2000
Clock Speed	1.3 GHz to 3.8 GHz
FSB Speed	400 MHz to 1066 MHz
Socket	Socket 423, Socket 478, LGA 775
Introduced	2000
Product Line	Pentium
Front Side Bus	400 MHz to 1066 MHz
Hyper-Threading	Yes (Prescott and later)
64-bit Support	Yes (Prescott and later)
Instruction Set	MMX, SSE, SSE2, SSE3
Discontinued	2008
Process Technology	180 nm, 130 nm, 90 nm, 65 nm
L2 Cache	256 KB, 512 KB, 1 MB, 2 MB
Lithography	180 nm, 130 nm, 90 nm, 65 nm
L1 Cache	8 KB