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Intel Pentium 4 User Manual

Intel Pentium 4
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I/O Controller Hub 2
R
Intel
®
Pentium
®
4 Processor / Intel
®
850 Chipset Family Platform Design Guide 167
9.9.1.7 Line Termination
Line termination mechanisms are not specified for the LAN Connect interface. Slew rate
controlled output buffers achieve acceptable signal integrity by controlling signal reflection,
over/undershoot, and ringback. A 33 series resistor can be installed at the driver side of the
interface should the developer have concerns about over/undershoot. Note that the receiver must
allow for any drive strength and board impedance characteristic within the specified ranges.
9.9.2 General LAN Routing Guidelines and Considerations
9.9.2.1 General Trace Routing Considerations
Trace routing considerations are important to minimize the effects of crosstalk and propagation
delays on sections of the board where high speed signals exist. Signal traces should be kept as
short as possible to decrease interference from other signals, including those propagated through
power and ground planes.
Observe the following suggestions to help optimize board performance:
Note: Some suggestions are specific to a 4.5 mil stack-up.
Maximum mismatch between the length of the clock trace and the length of any data trace is
0.5 inches.
Maintain constant symmetry and spacing between the traces within a differential pair.
Keep the signal trace lengths of a differential pair equal to each other.
Keep the total length of each differential pair under 4 inches. [Many customer designs with
differential traces longer than 5 inches have had one or more of the following issues: IEEE
phy conformance failures, excessive EMI, and/or degraded receive BER.]
Do not route the transmit differential traces closer than 70 mils to the receive differential
traces.
Do not route any other signal traces both parallel to the differential traces, and closer than
70 mils to the differential traces.
Keep maximum separation between differential pairs to 7 mils.
For high-speed signals, the number of corners and vias should be kept to a minimum. If a 90°
bend is required, it is recommended to use two 45° bends instead. Refer to Figure 121.
Traces should be routed away from board edges by a distance greater than the trace height
above the ground plane. This allows the field around the trace to couple more easily to the
ground plane rather than to adjacent wires or boards.
Do not route traces and vias under crystals or oscillators. This will prevent coupling to or
from the clock. And as a general rule, place traces from clocks and drives at a minimum
distance from apertures by a distance that is greater than the largest aperture dimension.

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Intel Pentium 4 Specifications

General IconGeneral
BrandIntel
ModelPentium 4
CategoryComputer Hardware
LanguageEnglish

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