Intel Pentium 4 User Manual

Introduction
R
Intel
®
Pentium
®
4 Processor / Intel
®
850 Chipset Family Platform Design Guide 3
Contents
1
Introduction........................................................................................................................ 17
1.1 Related Documentation ........................................................................................ 18
1.2 Conventions and Terminology.............................................................................. 19
1.3 System Overview.................................................................................................. 21
1.3.1 Intel
®
Pentium
®
4 Processor in the 478-pin Package ........................... 21
1.3.2 Intel
®
850 Chipset ................................................................................. 21
1.3.2.1 Intel
®
82850/82850E Memory Controller Hub (MCH) .......... 22
1.3.2.2 Intel
®
ICH2 ........................................................................... 22
1.3.3 System Configurations .......................................................................... 23
1.4 Platform Initiatives ................................................................................................ 24
1.4.1 Intel
®
850 Chipset ................................................................................. 24
1.4.1.1 Rambus Direct RDRAM* Device Interface .......................... 24
1.4.1.2 Accelerated Graphics Port (AGP)........................................ 24
1.4.2 Intel
®
ICH2 ............................................................................................ 24
1.4.2.1 Integrated LAN Controller .................................................... 24
1.4.2.2 Intel
®
AC’97 6-Channel Support .......................................... 25
1.4.2.3 Low Pin Count (LPC) Interface ............................................ 26
1.4.2.4 Ultra ATA ............................................................................. 26
1.4.2.5 Universal Serial Bus (USB).................................................. 26
1.4.3 Platform Manageability.......................................................................... 27
1.5 PC ’99/’01 Platform Compliance........................................................................... 28
2 Component Quadrant Layout ............................................................................................ 29
2.1 Processor Component Quadrant Layout.............................................................. 29
2.2 Intel
®
850/850E Chipset Component Quadrant Layout ........................................ 30
3 Platform Placement and Stack-Up Overview .................................................................... 31
3.1 Platform Component Placement .......................................................................... 31
3.1.1 Six-Layer Motherboard.......................................................................... 31
3.1.2 Four-Layer Motherboard ....................................................................... 32
3.1.2.1 Four-Layer Motherboard Routing Strategy .......................... 34
3.2 Motherboard Layer Stack-Up ............................................................................... 36
3.2.1 Six-Layer Motherboard Stack-Up.......................................................... 36
3.2.2 Design Considerations .......................................................................... 37
3.2.3 Four-Layer Motherboard Stack-Up ....................................................... 38
4 Platform Clock Routing Guidelines ................................................................................... 39
4.1 Routing Guidelines for System Bus Clocks .......................................................... 41
4.2 BCLK[1:0] Frequency Select ................................................................................ 46
4.2.1 100 MHz Operation – Intel
®
82850 Chipset .......................................... 46
4.2.2 133 MHz Operation – Intel
®
82850E Chipset........................................ 47
4.3 Routing Guidelines for Rambus RDRAM* Device Clocks .................................... 48
4.3.1 CK00 to Rambus DRCG* (Reference Clocks)...................................... 48
4.3.2 Intel
®
MCH to Rambus DRCG* (Phase Aligning Clocks)...................... 49

Intel Pentium 4 Specifications

General

Architecture	x86
Core Count	1
Microarchitecture	NetBurst
Manufacturer	Intel
Core Names	Willamette, Northwood, Prescott, Cedar Mill
Virtualization Technology	No
Release Date	November 20, 2000
Clock Speed	1.3 GHz to 3.8 GHz
FSB Speed	400 MHz to 1066 MHz
Socket	Socket 423, Socket 478, LGA 775
Introduced	2000
Product Line	Pentium
Front Side Bus	400 MHz to 1066 MHz
Hyper-Threading	Yes (Prescott and later)
64-bit Support	Yes (Prescott and later)
Instruction Set	MMX, SSE, SSE2, SSE3
Discontinued	2008
Process Technology	180 nm, 130 nm, 90 nm, 65 nm
L2 Cache	256 KB, 512 KB, 1 MB, 2 MB
Lithography	180 nm, 130 nm, 90 nm, 65 nm
L1 Cache	8 KB