Power Distribution Guidelines
R
Intel
®
Pentium
®
4 Processor / Intel
®
850 Chipset Family Platform Design Guide 229
12 Power Distribution Guidelines
12.1 Definitions
Suspend-To-RAM (STR) In the STR state, the system state is stored in main memory and all
unnecessary system logic is turned off. Only main memory and logic
required to wake the system remain powered.
Full-power operation: During full-power operation, all components on the motherboard
remain powered. Note that full-power operation includes both the full-
on operating state and the S1 (CPU stop-grant state) state.
Suspend operation: During suspend operation, power is removed from some components
on the motherboard. The customer reference board supports two
suspend states: Suspend-to-RAM (S3) and Soft-off (S5).
Core power rail: A power rail that is only on during full-power operation. These power
rails are on when the PSON signal is asserted to the ATX power
supply.
Standby power rail: A power rail that in on during suspend operation (these rails are also on
during full-power operation). These rails are on at all times (when the
power supply is plugged into AC power). The only standby power rail
that is distributed directly from the ATX power supply is: 5VSB (5 V
Standby). There are other standby rails that are created with voltage
regulators on the motherboard.
Derived power rail: A derived power rail is any power rail that is generated from another
power rail using an on-board voltage regulator. For example, 3.3VSB is
usually derived (on the motherboard) from 5VSB using a voltage
regulator.
Dual power rail: A dual power rail is derived from different rails at different times
(depending on the power state of the system). Usually, a dual power rail
is derived from a standby supply during suspend operation and derived
from a core supply during full-power operation. Note that the voltage
on a dual power rail may be misleading.
12.2 Power Management
The Intel 850 chipset-based platform implements the ACPI mechanisms software and hardware
that enables the system to minimize system power consumption, manage system thermal limits,
and maximize the battery life. This implementation involves tradeoffs among system speed and
noise.
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