Intel Pentium 4 User Manual

System Bus Routing
R
80 Intel
®
Pentium
®
4 Processor / Intel
®
850 Chipset Family Platform Design Guide
5.4.1.14 Topology 10: THERMTRIP# Power Down Circuit
It is required that power is removed from the processor core within 0.5 seconds of the assertion of
the THERMTRIP# signal. Below is an example circuit that will power down the processor voltage
regulator when THERMTRIP# is asserted.
Figure 44. THERMTRIP# Power Down Circuit
62
0.1uF
Q
Q
SET
CLR
D
3904
VCC_CPU
62
THERMTRIP#
10k
3V STANDBY
3904
10k
1k 100
3.3k
1k
12V 5V
10
VID POWERGOOD
VCCVID
10k
1.0uF
GND
EN
IN
OUT
PG
VCCVID REGULATOR
74AHC74
VCC=3V STANDBY
THERMTRIP_PWR-Down
In the above drawing, VID POWERGOOD is a signal that is connected to the output enable of the
processor voltage regulator controller.
Figure 45. Power Sequencing Block Diagram
Processor
Voltage
Regulator
System Power
Supply
VCCVID Voltage
Regulator
VID_Good
Generation
Logic
1ms
delay
Processor
VID[4:0]
VID_Good*
PS_PWR_OK
Vcc
*VID_Good connected to voltage
regulator controller output enable
ICH2
PWRGOOD
VRMPWRGD
Power_Sequencing

Intel Pentium 4 Specifications

General

Architecture	x86
Core Count	1
Microarchitecture	NetBurst
Manufacturer	Intel
Core Names	Willamette, Northwood, Prescott, Cedar Mill
Virtualization Technology	No
Release Date	November 20, 2000
Clock Speed	1.3 GHz to 3.8 GHz
FSB Speed	400 MHz to 1066 MHz
Socket	Socket 423, Socket 478, LGA 775
Introduced	2000
Product Line	Pentium
Front Side Bus	400 MHz to 1066 MHz
Hyper-Threading	Yes (Prescott and later)
64-bit Support	Yes (Prescott and later)
Instruction Set	MMX, SSE, SSE2, SSE3
Discontinued	2008
Process Technology	180 nm, 130 nm, 90 nm, 65 nm
L2 Cache	256 KB, 512 KB, 1 MB, 2 MB
Lithography	180 nm, 130 nm, 90 nm, 65 nm
L1 Cache	8 KB