Intel Pentium 4 User Manual

Power Distribution Guidelines
R
Intel
®
Pentium
®
4 Processor / Intel
®
850 Chipset Family Platform Design Guide 237
12.7 CPU / CK00 Power Sequencing Requirement
To ensure that the correct processor system bus frequency is set, the CPU BSELx pins must be at
an operating state before the CK00 clock chip powers up. An example circuit is shown below.
Figure 181. CPU/CK00 Sequencing Circuit
VCC3_CLK
CLK_PWRDWN
CK00 Clock
Chip / DRCG
VCCP
47K 5%
4.7K 5%
MBT3904 DUAL

Intel Pentium 4 Specifications

General

Architecture	x86
Core Count	1
Microarchitecture	NetBurst
Manufacturer	Intel
Core Names	Willamette, Northwood, Prescott, Cedar Mill
Virtualization Technology	No
Release Date	November 20, 2000
Clock Speed	1.3 GHz to 3.8 GHz
FSB Speed	400 MHz to 1066 MHz
Socket	Socket 423, Socket 478, LGA 775
Introduced	2000
Product Line	Pentium
Front Side Bus	400 MHz to 1066 MHz
Hyper-Threading	Yes (Prescott and later)
64-bit Support	Yes (Prescott and later)
Instruction Set	MMX, SSE, SSE2, SSE3
Discontinued	2008
Process Technology	180 nm, 130 nm, 90 nm, 65 nm
L2 Cache	256 KB, 512 KB, 1 MB, 2 MB
Lithography	180 nm, 130 nm, 90 nm, 65 nm
L1 Cache	8 KB