Introduction
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26 Intel
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Pentium
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4 Processor / Intel
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850 Chipset Family Platform Design Guide
1.4.2.3 Low Pin Count (LPC) Interface
In the platform, the super I/O component uses the Low Pin Count (LPC) interface. The LPC super
I/O component requires the same feature set as traditional super I/O components. It should include
a keyboard and mouse controller, floppy disk controller and serial and parallel ports. In addition to
the standard super I/O features, an integrated game port is recommended because the AC’97
interface does not provide support for a game port. In a system with ISA audio, the game port
typically existed on the audio card. The fifteen-pin game port connector provides for two joysticks
and a two-wire MPU-401 MIDI interface.
For further information, refer to the Low Pin Count Interface Specification, Revision 1.0, that is
located at the following URL: http://developer.intel.com/design/pcisets/lpc/INDEX.HTM
. Consult
your super I/O vendor for a comprehensive list of devices offered and features supported.
1.4.2.4 Ultra ATA
Ultra ATA "widens" the path to the hard drive by transferring twice as much data per clock cycle.
The net effect is that the maximum burst data transfer rate from the disk drive increases from
16.6 MB/s to 100 MB/s. Hard disk drive manufacturers can now bring higher performance
products to market that scale with the rest of the PC platform (faster hard drives to feed faster
processors, memory and graphics).
The Ultra ATA protocol allows Intel 850 chipset-based systems to send and retrieve data faster,
removing bottlenecks associated with data transfers — especially during sequential operations.
Users of new Intel 850 chipset-based systems will need less time to boot their systems and open
applications, a direct result of the improved throughput provided by Ultra ATA. Current disk drive
technology has been optimized to perform within the limits of the legacy protocol (16.6 MB/s).
Raising the data transfer headroom results in moderate performance gains with today’s drive
technology. Even greater performance improvements will emerge as drive manufacturers introduce
products that generate a faster data stream.
The ICH2 supports the IDE controller with two sets of interface signals (Primary and Secondary)
that can be independently enabled, tri-stated or driven low. It supports the Ultra ATA/33, Ultra
ATA/66 and Ultra ATA/100 protocol transfer rates. Ultra ATA/66 and ATA/100 are similar to the
Ultra ATA/33 scheme and are intended to be device driver compatible. The Ultra ATA/66 logic is
clocked at 66 MHz and can move 16 bits of data every two clocks (for a maximum of 66 MB/s
transfers), and the Ultra ATA/100 logic is clocked at 100 MHz and can move 16 bits of data every
two clocks (for a maximum of 100 MB/s transfers).
1.4.2.5 Universal Serial Bus (USB)
Universal Serial Bus (USB) simplifies the peripheral attaching and accessing process to the
computer. It also eases the system configuration process from an end-user’s perspective. The USB
specification outlines a single connector-type for all PC peripherals, automatic
detection/configuration of the USB devices and transfer types allowed on the bus.
In the Intel 850 chipset based platform, the ICH2 integrates two USB Host Controllers. The Host
Controllers include the root hub with two separate USB ports, resulting in a total of four USB
ports. The ICH2 Host Controller supports the standard Universal Host Controller Interface
(UHCI), Revision 1.0.
Refer to the USB Specification, Revision 1.1 at http://www.usb.org
for further information.