Introduction
R
18 Intel
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Pentium
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4 Processor / Intel
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850 Chipset Family Platform Design Guide
1.1 Related Documentation
Refer to the following documents or models for more information. All Intel issued documentation
revision numbers are subject to change, and the latest revision should be used. The specific
revision numbers referenced should be used for all documents not released by Intel.
• ITP700 Debug Port Design Guide
• Intel
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Pentium
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4 Processor in the 478-pin Package Thermal Design Guidelines
• Intel
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Pentium
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4 Processor 478 Pin Socket (mPGA478) Design Guidelines
• Intel
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Pentium
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4 Processor in the 478-pin Package datasheet
• Intel
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Pentium
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4 Processor with 512-KB L2 Cache on 0.13 Micron Process datasheet
• Intel
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Pentium
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4 Processor in the 478-pin Package I/O Buffer
1
Models
• Intel
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Pentium
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4 Processor VR Down Design Guidelines
• Intel
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850 Chipset Family82850/82850E Memory Controller Hub (MCH) Datasheet
• Intel
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850 Chipset Family: 82850/82850E Memory Controller Hub (MCH) Specification
Update
• Intel
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850 Chipset: Thermal Considerations Application Note (AP-720)
• Intel
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82801BA I/O Controller Hub 2 (ICH2) and Intel
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82801BAM I/O Controller Hub
2 Mobile (ICH2-M) Datasheet
• Intel
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82801BA I/O Controller Hub 2 (ICH2) and Intel
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82801BAM I/O Controller Hub
2 Mobile (ICH2-M) Specification Update
• Communication and Network Riser (CNR) Specification, Revision 1.0
• AC ’97 Component Specification, Revision 2.1
• Accelerated Graphics Port Interface Specification, Revision 2.0
• Low Pin Count Interface Specification, Revision 1.0
• PCI Local Bus Specification, Revision 2.2
• PCI-PCI Bridge Specification, Revision 1.0
• PCI Bus Power Management Interface Specification, Revision 1.0
• Universal Serial Bus Specification, Revision 1.1
• Rambus RDRAM* technology documentation
• Advanced Configuration and Power Interface Specification (ACPI), Revision 1.0b
• PC ’01 Specification
• CK00 Clock Synthesizer/Driver Design Guidelines Specification, Revision 1.0
• CK00-E Clock Synthesizer/Driver Design Guidelines Specification, Revision 1.0
Note:
1
The I/O Buffer Models are in IBIS format.