Intel Pentium 4 User Manual

Memory Interface Routing
R
108 Intel
®
Pentium
®
4 Processor / Intel
®
850 Chipset Family Platform Design Guide
Figure 71. Rambus RDRAM* Device CMOS Shunt Transistor
R
I
M
M
S
SCK
MCH
175
mils
175
mils
5 mils
wide
MCH
R
I
M
M
S
5 mils
wide
175
mils
175
mils
CMD
2N3904
R
5V
Q
Control
Logic
This implementation is applicable for RIMM connectors down solution only and is not needed on
the repeater channels. Also, this implementation is not necessary if Suspend-to-RAM is not
supported within the system
6.1.8 Rambus RDRAM* Device Channel Margin Improvement
For Intel 850E / 533 MHz (PC1066) RDRAM device designs which exhibit less than optimum
Rambus channel margins, margin improvement may be achieved by:
• Increasing the number of bypass capacitors from one 0.1µF ceramic chips capacitors per two
RSL lines to two 0.1µF ceramic chip capacitors per two RSL lines. See Section 6.1.3.
• Insuring that the RIMM module with the most number of RDRAM devices is placed in the #1
RIMM connector.

Intel Pentium 4 Specifications

General

Architecture	x86
Core Count	1
Microarchitecture	NetBurst
Manufacturer	Intel
Core Names	Willamette, Northwood, Prescott, Cedar Mill
Virtualization Technology	No
Release Date	November 20, 2000
Clock Speed	1.3 GHz to 3.8 GHz
FSB Speed	400 MHz to 1066 MHz
Socket	Socket 423, Socket 478, LGA 775
Introduced	2000
Product Line	Pentium
Front Side Bus	400 MHz to 1066 MHz
Hyper-Threading	Yes (Prescott and later)
64-bit Support	Yes (Prescott and later)
Instruction Set	MMX, SSE, SSE2, SSE3
Discontinued	2008
Process Technology	180 nm, 130 nm, 90 nm, 65 nm
L2 Cache	256 KB, 512 KB, 1 MB, 2 MB
Lithography	180 nm, 130 nm, 90 nm, 65 nm
L1 Cache	8 KB