Intel Pentium 4 - 2 X;4 X Signals; AGP Less Than 6 Inches

Layout Review Checklist
R
Intel
®
Pentium
®
4 Processor / Intel
®
850 Chipset Family Platform Design Guide 283
16.4.2 2X/4X Signals
The 2X/4X signals are: AD[31:0], C/BE[3:0]#, ADSTB[1:0]#, SBA[7:0], SB_STB, SB_STB#
16.4.2.1 AGP Less Than 6 Inches
√ Recommendations Reason/Impact
• 5 mil trace width 15 mil separation between
data to data for 60
Ω ±10%; for 60 Ω ±15%,
its 20 mils
• Refer to Section 7.1.2.1.
• 5 mil trace width 20 mil separation between
data (and all other signals) to strobes for
60
Ω ±10% and 60 Ω ±15%
• Refer to Section 7.1.2.1.
• 5 mil trace width 15 mil separation between
strobe-to-strobe for 60
Ω ±10%; for
60
Ω ±%, its 20 mils
• Refer to Section 7.1.2.1.
• If AGP Interface is <6 inches long, then
DATA and C/BE#s need to be length
matched within ±.25 inches of strobes.
• Refer to Section 7.1.2.1.
• Strobe pairs must be length matched
±0.1 inches
• Refer to Section 7.1.2.1.
• Route AD [15:0], C/BE [1:0]#, AD_STB0,
and AD_STB0# together. (Good
recommendation, but not in AGP
specification)
• Signals to be kept on same layers.
Microstrip-to-microstrip and stripline-to-
stripline.
• Refer to Section 7.1.2.1.
• Route AD [31:16], C/BE [3:2]#, AD_STB1,
and AD_STB1# together. (Good
recommendation, but not in AGP
specification)
• Signals to be kept on same layers.
Microstrip-to-microstrip and stripline-to-
stripline.
• Refer to Section 7.1.2.1.
• Route SBA [7:0], SB_STB, SB_STB#
together. (Good recommendation, but not in
AGP specification)
• Signals to be kept on same layers.
Microstrip-to-microstrip and stripline-to-
stripline.
• Refer to Section 7.1.2.1.
• Recommended that all strobes be ground
referenced as well as TRDY#, IRDY#,
GNT#.
• Refer to Section 7.1.5.
• Recommended that ½ the AGP signals are
ground referenced.
• Refer to Section 7.1.5.
• For signals that require pull-up or pull-down
resistors, keep stub less than 0.5 inches for
1X signals and 0.01 inches for 2X/4X
signals.
• This is to minimize signal reflections from
the stub.
• Refer to Section 7.1.9.
• Pour a Ground flood under the V
DDQ
plane • Optimizes the mutual inductance between
two planes.
• Refer to Section 7.1.4.