Intel Pentium 4 User Manual

I/O Controller Hub 2
R
152 Intel
®
Pentium
®
4 Processor / Intel
®
850 Chipset Family Platform Design Guide
9.6.1.3 The Unified VCC_ Suspend Architecture
In this design all SMBus devices are powered by the VCC_Suspend supply. Consideration must be
made to provide enough VCC_Suspend current while in STR.
Figure 106. Unified VCC_Suspend Architecture
ICH2
SM BUS
DEVICES
Vsus
SM BUS
Vsus
Vsus
9.6.1.4 The Unified VCC_Core Architecture
In this design, all SMBUS devices are powered by the VCC_Core supply. This architecture allows
none of the devices to operate in STR, but minimizes the load on VCC_Suspend. See Figure 107.
Figure 107. Unified VCC_Core Architecture
ICH2
SM BUS
DEVICES
Vsus
Vcore
SM BUS
Vcore
NOTES:
1. The SMBus device needs to be back-drive safe while its supply (Vcore) is off and VCC_Suspend is still
powered.
2. In suspended modes where VCC_Core is OFF and VCC_Suspend is on, the VCC_Core node will be
very near ground. In this case the input leakage of the ICH2 will be approximately 10 uA.

Intel Pentium 4 Specifications

General

Architecture	x86
Core Count	1
Microarchitecture	NetBurst
Manufacturer	Intel
Core Names	Willamette, Northwood, Prescott, Cedar Mill
Virtualization Technology	No
Release Date	November 20, 2000
Clock Speed	1.3 GHz to 3.8 GHz
FSB Speed	400 MHz to 1066 MHz
Socket	Socket 423, Socket 478, LGA 775
Introduced	2000
Product Line	Pentium
Front Side Bus	400 MHz to 1066 MHz
Hyper-Threading	Yes (Prescott and later)
64-bit Support	Yes (Prescott and later)
Instruction Set	MMX, SSE, SSE2, SSE3
Discontinued	2008
Process Technology	180 nm, 130 nm, 90 nm, 65 nm
L2 Cache	256 KB, 512 KB, 1 MB, 2 MB
Lithography	180 nm, 130 nm, 90 nm, 65 nm
L1 Cache	8 KB