Intel Pentium 4 User Manual

Hub Interface Routing
R
Intel
®
Pentium
®
4 Processor / Intel
®
850 Chipset Family Platform Design Guide 129
The reference voltage generated by a single HIREF divider should be bypassed to ground at each
component with a 0.01µF capacitor located close to the component HUBREF pin. If the reference
voltage is generated locally, the bypass capacitor needs to be close to the component HUBREF
pin. Example HIREF divider circuits are shown in Figure 84 and Figure 85.
Figure 84. 8-Bit Hub Interface with a Shared Reference Divider Circuit (Normal Mode)
HLREF_A
HUBREF
MCH
ICH2
HubRef1
R1
1.8 V
R2
C2
C2
C1
Figure 85. 8-Bit Hub Interface with Locally Generated Reference Divider Circuits
HUBREF
HUBREF
MCH
ICH2
HubRef2
R1
1.8 V
R2
C2
R1
1.8 V
R2
C2
The resistor values, R1 and R2, must be rated at 1% tolerance. The selected resistor values ensure
that the reference voltage tolerance is maintained over the input leakage specification. A 0.1 µF
capacitor (C1 in the above circuits) should be placed close to R1 and R2. Also, a 0.01 µF bypass
capacitor (C2 in the above circuits) should be placed within 0.25 inches of each HUBREF pin.
The trace length from the divider circuit to the HLREF pin must be no longer than 3.5 inches.

Intel Pentium 4 Specifications

General

Architecture	x86
Core Count	1
Microarchitecture	NetBurst
Manufacturer	Intel
Core Names	Willamette, Northwood, Prescott, Cedar Mill
Virtualization Technology	No
Release Date	November 20, 2000
Clock Speed	1.3 GHz to 3.8 GHz
FSB Speed	400 MHz to 1066 MHz
Socket	Socket 423, Socket 478, LGA 775
Introduced	2000
Product Line	Pentium
Front Side Bus	400 MHz to 1066 MHz
Hyper-Threading	Yes (Prescott and later)
64-bit Support	Yes (Prescott and later)
Instruction Set	MMX, SSE, SSE2, SSE3
Discontinued	2008
Process Technology	180 nm, 130 nm, 90 nm, 65 nm
L2 Cache	256 KB, 512 KB, 1 MB, 2 MB
Lithography	180 nm, 130 nm, 90 nm, 65 nm
L1 Cache	8 KB