Intel Pentium 4 User Manual

Memory Interface Routing
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Intel
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Pentium
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4 Processor / Intel
®
850 Chipset Family Platform Design Guide 93
To ensure a solid memory subsystem design, the RSL signals routing rules need to be followed.
Below is a break down of the key areas to watch when design your platform.
• To control crosstalk and odd/even mode velocity deltas, there must be a 10 mil ground
isolation trace between adjacent RSL signals (see Figure 58). The 10 mil ground isolation
traces must be connected to ground with vias distributed less than every 1 inch. A via must be
placed within less than 0.5 inches of the beginning and end of the ground isolation trace. A
6 mil gap is required between RSL signals and ground isolation trace.
• RSL signals must be length matched to ±10 mils in section “A” and ±2 mils in sections “B”
using the trace length matching methods described in the next section. There is no trace
length-matching requirement for traces in section ‘C’. If signals are routed on inner and outer
layers, the trace velocity differences need to be accounted for to minimize channel skew.
• RSL signals must have the same number of vias. It may be necessary to place additional vias
(dummy vias) on certain RSL signals - even if vias are not needed - to meet the via loading
(equal number of vias) requirement.
Figure 58. RSL Routing Diagram Showing Ground Isolation Traces with VIA Around RSL
Signals
RSL Signal Trace
Gound Isolation Trace
RSL Signal Trace
Gound Isolation Trace
Gound Isolation Trace
10 mils
6 mils
18 mils
6 mils
10 mils
6 mils
18 mils
6 mils
10 mils
VIA used to connect the
ground isolation trace to
the gound plane
VIA spacing less than 1" apart
NOTE: For the Intel 850 chipset customer reference board (CRB), both inner and outer layer RSL trace width
is 18 mils. Inner layer RSL trace width may vary depending on the board stack-up used. RSL signals
should be no wider than 18 mils to prevent neck-down in the RIMM connector pin field.

Intel Pentium 4 Specifications

General

Architecture	x86
Core Count	1
Microarchitecture	NetBurst
Manufacturer	Intel
Core Names	Willamette, Northwood, Prescott, Cedar Mill
Virtualization Technology	No
Release Date	November 20, 2000
Clock Speed	1.3 GHz to 3.8 GHz
FSB Speed	400 MHz to 1066 MHz
Socket	Socket 423, Socket 478, LGA 775
Introduced	2000
Product Line	Pentium
Front Side Bus	400 MHz to 1066 MHz
Hyper-Threading	Yes (Prescott and later)
64-bit Support	Yes (Prescott and later)
Instruction Set	MMX, SSE, SSE2, SSE3
Discontinued	2008
Process Technology	180 nm, 130 nm, 90 nm, 65 nm
L2 Cache	256 KB, 512 KB, 1 MB, 2 MB
Lithography	180 nm, 130 nm, 90 nm, 65 nm
L1 Cache	8 KB