Intel Pentium 4 User Manual

Hub Interface Routing
R
Intel
®
Pentium
®
4 Processor / Intel
®
850 Chipset Family Platform Design Guide 131
8.3 Hub Interface Routing Guidelines - Four-Layer
Motherboard
To optimize the MCH 1.8V core and RAC power delivery, the hub interface should be routed on
the top layer. The 1.8V power pins within the hub interface pin field should have VIAs to the 1.8V
power plane on layer 2 and 4 as well as attach to the high reference decoupling capacitors. See the
below graphic for more details.
Figure 86. Example Hub Interface Breakout / 1.8 V MCH Fingers
MCH Top
Layer

Intel Pentium 4 Specifications

General

Architecture	x86
Core Count	1
Microarchitecture	NetBurst
Manufacturer	Intel
Core Names	Willamette, Northwood, Prescott, Cedar Mill
Virtualization Technology	No
Release Date	November 20, 2000
Clock Speed	1.3 GHz to 3.8 GHz
FSB Speed	400 MHz to 1066 MHz
Socket	Socket 423, Socket 478, LGA 775
Introduced	2000
Product Line	Pentium
Front Side Bus	400 MHz to 1066 MHz
Hyper-Threading	Yes (Prescott and later)
64-bit Support	Yes (Prescott and later)
Instruction Set	MMX, SSE, SSE2, SSE3
Discontinued	2008
Process Technology	180 nm, 130 nm, 90 nm, 65 nm
L2 Cache	256 KB, 512 KB, 1 MB, 2 MB
Lithography	180 nm, 130 nm, 90 nm, 65 nm
L1 Cache	8 KB