PTX5000 Centralized Clock Generator Description
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CCG Slots on page 16
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CCG Function on page 16
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CCG Components on page 16
CCG Slots
The Centralized Cock Generators (CCGs) are installed into the upper rear of the chassis
in the slots labeled CCG0 and CCG1. One CCG is shipped as part of the standard packet
transport switch configuration, but up to two CCGs can be installed to provide redundancy.
A nonredundant CCG is hot-pluggable. For redundant CCGs, the master CCG is
hot-pluggable. The backup CCG is hot-removable and hot-insertable if the master CCG
is functioning. Removing the backup CCG does not affect the functioning of the packet
transport switch. Taking the master CCG offline might result in a brief loss of the clock
lock while the backup CCG becomes the master.
CCG Function
CCGs provide a 19.44-MHz Stratum 3E clock signal for the Ethernet network interfaces
on the packet transport switch.
CCG Components
Each CCG (see Figure 5 on page 16) consists of the following components:
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19.44-MHz Stratum 3E clock.
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Field-programmable gate array (FPGA) that performs multiplexing of clock sources.
Figure 5: CCG
3—1—
Two RJ-48 connectors labeled BITS A and
BITS B for BITS external clock inputs,
1.5444 MHz or 2.048 MHz. Two LEDs for
each BITS connector—FAULT and
LINK—that display the status of the BITS
ports.
Three LEDs—OK, FAIL, and MASTER—that
display the status of the CCG.
4—2—
Four GPS connectors labeled GPS0
CLOCK, GPS0 SYNC, GPS1 CLOCK, and
GPS1 SYNC, for GPS external clock inputs,
5 MHz or 10 MHz. The LEDs for the GPS ports
are not supported.
ONLINE/OFFLINE button
Related
Documentation
PTX5000 Centralized Clock Generator LEDs on page 17•
Copyright © 2012, Juniper Networks, Inc.16
PTX5000 Packet Transport Switch Hardware Guide