SM 203 D163
NCCP (New Communication Control Processor)
Controls the SG3 board.
CPU (RU30)
DPRAM (Dual Port RAM): Handshaking with the FCU is done through this block.
DMA controller
JBIG
DSP V34 modem (RL5T892): Includes the DTMF Receiver function
DCR for MH, MR, MMR, and JBIG compression and decompression
FROM
1Mbyte flash ROM for SG3 software storage and modem software storage
SDRAM
4Mbyte DRAM shared between ECM buffer, line buffer, and working memory
AFE (Analog Front End)
Analog processing
CODEC (COder-DECoder)
A/D & D/A conversions for modem
REG
Generates +3.3 V from the +5V from the FCU