xvList of Figures
Date Code 20150130 Instruction Manual SEL-787 Relay
Figure 10.5 CTR2 Current Source Connections .........................................................................................10.8
Figure 10.6 Wye Voltage Source Connections............................................................................................ 10.8
Figure 10.7 Delta Voltage Source Connections........................................................................................... 10.9
Figure B.1 Firmware File Transfer Process.................................................................................................B.7
Figure C.1 SEL Communications Processor Star Integration Network.......................................................C.3
Figure C.2 Multitiered SEL Communications Processor Architecture .......................................................C.4
Figure C.3 Enhancing Multidrop Networks With SEL Communications Processors .................................C.6
Figure C.4 Example of SEL Relay and SEL Communications Processor Configuration ...........................C.7
Figure D.1 Application Confirmation Timing With URETRY n = 2.......................................................... D.7
Figure D.2 Message Transmission Timing ................................................................................................. D.8
Figure D.3 Sample Response to SHO DNP Command ............................................................................ D.23
Figure D.4 Port MAP Command .............................................................................................................. D.24
Figure D.5 Sample Custom DNP3 AI Map Settings................................................................................. D.26
Figure D.6 Analog Input Map Entry in
ACSELERATOR QuickSet Software ............................................ D.27
Figure D.7 AI Point Label, Scaling and Dead Band in
ACSELERATOR QuickSet Software .................... D.27
Figure D.8 Sample Custom DNP3 BO Map Settings............................................................................... D.28
Figure D.9 Binary Output Map Entry in
ACSELERATOR QuickSet Software .......................................... D.28
Figure F.1 SEL-787 Predefined Reports ..................................................................................................... F.6
Figure F.2 SEL-787 Datasets ...................................................................................................................... F.8
Figure F.3 Goose Quality ............................................................................................................................ F.9
Figure G.1 DeviceNet Card Component Overview.................................................................................... G.2
Figure H.1 Phase Reference........................................................................................................................ H.2
Figure H.2 Waveform at Relay Terminals May Have a Phase Shift........................................................... H.3
Figure H.3 Correction of Measured Phase Angle....................................................................................... H.3
Figure H.4 Sample MET PM Command Response .................................................................................. H.11