Sel SEL-787 - Table 4.28 Latch Bits Equation Settings

4.72
SEL-787 Relay Instruction Manual Date Code 20150130
Protection and Logic Functions
Logic Settings (SET L Command)
Latch Bits:
Nonvolatile State
Power Loss
The states of the latch bits (LT01–LT32) are retained if power to the device is
lost and then restored. If a latch bit is asserted (e.g., LT02 := logical 1) when
power is lost, it is asserted (LT02 := logical 1) when power is restored. If a
latch bit is deasserted (e.g., LT03 := logical 0) when power is lost, it is
deasserted (LT03 := logical 0) when power is restored.
Settings Change
If individual settings are changed, the states of the latch bits (Relay Word bits
LT01 through LT32) are retained, as in the preceding Power Loss on page 4.72
explanation. If the individual settings change causes a change in SEL
OGIC
control equation settings SETn or RSTn (n = 1 through 32), the retained states of
the latch bits can be changed, subject to the newly enabled settings SETn or RSTn.
Make Latch Control Switch Settings With Care
The latch bit states are stored in nonvolatile memory so they can be retained
during power loss or settings change. The nonvolatile memory is rated for a
finite number of writes for all cumulative latch bit state changes. Exceeding
the limit can result in a flash self-test failure. An average of 5000 cumulative
latch bit state changes per day can be made for a 25-year device service life.
Settings SETn and RSTn cannot result in continuous cyclical operation of
latch bit LTn. Use timers to qualify conditions set in settings SETn and RSTn.
If you use any optoisolated inputs in settings SETn and RSTn, the inputs each
Table 4.28 Latch Bits Equation Settings
Settings Prompt Setting Range Setting Name := Factory Default
SET01 SELOGIC SET01 := R_TRIG SV01T AND NOT LT01
RST01 SEL
OGIC RST01 := R_TRIG SV01T AND LT01
SET02 SEL
OGIC SET02 := R_TRIG SV02T AND NOT LT02
AND PB02
RST02 SEL
OGIC RST02 := R_TRIG SV02T AND LT02 AND
PB02
SET03 SEL
OGIC SET03 := (PB03 AND R_TRIG SV02T)
AND LT01 AND NOT (52A1 AND NOT
LT02 OR 52A2 AND LT02)
RST03 SEL
OGIC RST03 := (R_TRIG SV02T OR SV03T)
AND LT03
SET04 SEL
OGIC SET04 := (PB04 AND R_TRIG SV02T)
AND (52A1 AND NOT LT02 OR 52A2
AND LT02)
RST04 SEL
OGIC RST04 := (R_TRIG SV02T OR SV04T)
AND LT04
•
•
•
•
•
•
•
•
•
SET32 SEL
OGIC SET32 := NA
RST32 SEL
OGIC RST32 := NA