GR712RC-UM, Jun 2017, Version 2.9 4 www.cobham.com/gaisler
GR712RC
14.4 Signal definitions ................................................................................................. 97
15 UART Serial Interface........................................................................................ 98
15.1 Overview.............................................................................................................. 98
15.2 Operation.............................................................................................................. 98
15.3 Baud-rate generation............................................................................................ 99
15.4 Loop back mode................................................................................................... 99
15.5 FIFO debug mode .............................................................................................. 100
15.6 Interrupt generation............................................................................................ 100
15.7 Registers............................................................................................................. 100
15.8 Signal definitions ............................................................................................... 102
16 SpaceWire Interface with RMAP support...................................................... 103
16.1 Overview............................................................................................................ 103
16.2 Operation............................................................................................................ 103
16.3 Link interface ..................................................................................................... 104
16.4 Receiver DMA channels .................................................................................... 106
16.5 Transmitter DMA channels .................................................................................112
16.6 RMAP .................................................................................................................115
16.7 AMBA interface................................................................................................. 120
16.8 SpaceWire clock generation............................................................................... 121
16.9 Registers............................................................................................................. 122
16.10 Signal definitions ............................................................................................... 127
17 Ethernet Media Access Controller (MAC) ..................................................... 128
17.1 Overview............................................................................................................ 128
17.2 Operation............................................................................................................ 128
17.3 Tx DMA interface .............................................................................................. 129
17.4 Rx DMA interface.............................................................................................. 130
17.5 MDIO Interface.................................................................................................. 132
17.6 Reduced Media Independent Interfaces (RMII) ................................................ 132
17.7 Registers............................................................................................................. 132
17.8 Signal definitions ............................................................................................... 135
18 CAN Interface ................................................................................................... 136
18.1 Overview............................................................................................................ 136
18.2 CAN controller overview................................................................................... 136
18.3 AHB interface .................................................................................................... 136
18.4 BasicCAN mode ................................................................................................ 137
18.5 PeliCAN mode ................................................................................................... 141
18.6 Common registers .............................................................................................. 151
18.7 Design considerations ........................................................................................ 152
18.8 Signal definitions ............................................................................................... 152
19 Obsolete.............................................................................................................. 153
19.1 Signal definitions ............................................................................................... 153
20 CAN Bus multiplexor........................................................................................ 154
20.1 Overview............................................................................................................ 154
20.2 Operation............................................................................................................ 154
20.3 Registers............................................................................................................. 154