122
• Bit 15 (Parity Error Flag (PEF)): When a parity check is carried out, PEF indicates whether a
parity error has occurred. 0 indicates that no parity error has occurred; 1 indicates that a parity
error has occurred.
Bit 15: PEF Description
0 No parity error (Initial value)
Cleared by reading PEF after it has been set to 1, then writing 0 in
PEF
1 Parity error has occurred
• Bit 14 (Parity Output Force (PFRC)): PFRC selects whether to produce a forced parity output
for testing the parity error check function. When cleared to 0, there is no forced output; when
set to 1, it produces a forced high-level output from the DPH and DPL pins when data is
output, regardless of the parity.
Bit 14: PFRC Description
0 Parity output not forced (Initial value)
1 High output forced
• Bit 13 (Parity Polarity (PEO)): PEO selects even or odd parity. When cleared to 0, parity is
even; when set to 1, parity is odd.
Bit 13: PEO Description
0 Even parity (Initial value)
1 Odd parity
• Bits 12 and 11 (Parity Check Enable Bits 1 and 0 (PCHK1 and PCHK0)): These bits determine
whether or not parity is checked and generated, and select the check and generation spaces.
Bit 12: PCHK1 Bit 11: PCHK0 Description
0 0 Parity not checked and not generated (Initial value)
1 Parity checked and generated only in DRAM area
1 0 Parity checked and generated in DRAM area and area
2
1 Reserved
• Bits 10–0 (Reserved): These bits are always read as 0. The write value should always be 0.
To Next Page
Loading...
