586
A.2.22 Buffer Registers B3, 4 (BRB3, BRB4) ITU
• Start Address: H'5FFFF2E (channel 3), H'5FFFF3E (channel 4)
• Bus Width: 8/16/32
Register Overview:
Bit: 15 14 13 12 11 10 9 8
Bit name:
Initial value: 1 1 1 1 1 1 1 1
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 7 6 5 4 3 2 1 0
Bit name:
Initial value: 1 1 1 1 1 1 1 1
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Table A.23 BRB3, BRB4 Bit Functions
Bit Bit name Description
15–0 Buffer registers used for output
compare/input capture
Output compare register: Transfers to GRB the
value stored up to compare match generation
Input capture register: Stores the value stored in
GRB up to input capture signal generation