Hitachi SH7032 - Operation

458
H'FFFE000
H'FFFE004
H'FFFE001
H'FFFE005
H'FFFE002
H'FFFE006
H'FFFE003
H'FFFE007
H'FFFFFFC H'FFFFFFD H'FFFFFFE H'FFFFFF
On-chip RAM
Internal data bus (32 bits)
H'FFFF000
H'FFFF004
H'FFFF001
H'FFFF005
H'FFFF002
H'FFFF006
H'FFFF003
H'FFFF007
H'FFFFFFC H'FFFFFFD H'FFFFFFE H'FFFFFFF
On-chip RAM
Internal data bus (32 bits)
SH7032
SH7034
Note: Addresses in the figure are the lowest shadow addresses in on-chip RAM space.
Note: Addresses in the figure are the lowest shadow addresses in on-chip RAM space.
Figure 18.1 Block Diagram of RAM
18.2 Operation
Accesses to addresses H'FFFE000–H'FFFFFFF (SH7032) or addresses H'FFFF000–H'FFFFFFF
(SH7034) are directed to the on-chip RAM. Memory area 7 (H'F000000–H'FFFFFFF) is divided
into shadows in 8 kbyte units for the SH7032 and 4-kbyte units for the SH7034. All shadow
accesses are on-chip RAM accesses. For more information on shadows, see section 8, Bus State
Controller (BSC).